Server-enabled chip card interface tamper detection

US10438189B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10438189-B2
Application numberUS-201715439708-A
CountryUS
Kind codeB2
Filing dateFeb 22, 2017
Priority dateFeb 22, 2017
Publication dateOct 8, 2019
Grant dateOct 8, 2019

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A payment processing device can implement a monitoring system to detect for tamper attempts at a physical interface such as a chip card interface. The monitoring system can establish local tamper criteria including a baseline when no chip card is present in the chip card interface, or in some embodiments, when it is known that an authentic chip card is present in the slot. During subsequent evaluations of the chip card interface by the monitoring system, a response received by the monitoring system that deviates from the local test criteria can indicate that a tamper attempt at the chip card interface may have occurred. The payment processing device may also communicate test results to a server for further testing, or for an update of the local test criteria.

First claim

Opening claim text (preview).

What is claimed is: 1. A payment reader for exchanging payment information with a chip card and having circuitry to identify an attempt to tamper with a chip card interface of the payment reader, comprising: a chip card interface comprising at least a voltage interface, a reset interface, a clock interface, an input/output interface, a ground interface, and a programming interface; a plurality of chip card lines, comprising: a voltage line coupled to the voltage interface; a reset line coupled to the reset interface; a clock line coupled to the clock interface; an input/output line coupled to the input/output interface; a ground line coupled to the ground interface; and a programming line coupled to the programming interface; and a communication interface; a memory having instructions stored thereon; a processing unit coupled to the chip card interface via the plurality of chip card lines, coupled to the communication interface, and coupled to the memory to execute instructions to: apply a non-standard signal to one or more of the plurality of chip card lines; measure a response value for the non-standard signal; transmit the response value to a payment service system via the communication interface; determine whether one or more local tamper criteria are satisfied based on the response value, wherein the one or more local tamper criteria are based on one or more communications received from the payment service system; and identify a tamper attempt when the one or more local tamper criteria are satisfied. 2. The payment reader of claim 1 , wherein the processor further executes the instructions to: receive, via the communication interface, a tamper determination message, wherein the tamper determination message is generated by the payment service system based on the response value; and identify the tamper attempt based on the tamper determination message. 3. The payment reader of claim 1 , wherein the processor further executes the instructions to: receive, via the communication interface, a local tamper criteria update message, wherein the local tamper criteria update message is generated by the payment service system based on response values received from a plurality of payment readers; and update the local tamper criteria based on the local tamper criteria update message. 4. A transaction device for exchanging information and having circuitry for detecting an attempt to tamper with a contact interface of the transaction device, comprising: a contact interface comprising a plurality of pins; a plurality of contact lines coupled to the pins of the contact interface; a communication interface; a memory having instructions stored thereon; and a processing unit coupled to the contact interface via the plurality of contact lines, to the communication interface, and to the memory to execute the instructions to: apply a non-standard signal to one or more of the plurality of contact lines; measure a response value for the non-standard signal; transmit the response value to a payment service system via the communication interface; determine whether one or more local tamper criteria are satisfied based on the response value; and identify a tamper attempt when the one or more local tamper criteria are satisfied. 5. The transaction device of claim 4 , wherein the one or more local tamper criteria are based on one or more communications received from the payment service system. 6. The transaction device of claim 4 , wherein the processor further executes the instructions to: receive, via the communication interface, a tamper determination message, wherein the tamper determination message is generated by the payment service system based on the response value; and identify the tamper attempt based on the tamper determination message. 7. The transaction device of claim 4 , wherein the local tamper criteria comprise one or more baseline values, and wherein the determination whether one or more local tamper criteria are satisfied based on the response value is based on a comparison of the response value to the one or more baseline values. 8. The transaction device of claim 4 , wherein the processor further executes the instructions to: receive, via the communication interface, a local tamper criteria update message, wherein the local tamper criteria update message is generated by the payment service system based on response values received from a plurality of transaction devices; and update the local tamper criteria based on the local tamper criteria update message. 9. The transaction device of claim 4 , wherein the non-standard signal is a capacitance measurement signal and the response value is a capacitance value associated with the capacitance measurement signal. 10. The transaction device of claim 4 , wherein the non-standard signal is a time-domain reflection signal and the response value is a time delayed reflection value associated with the time-domain reflection signal. 11. The transaction device of claim 4 , wherein the non-standard signal is an audio signal and the response value is an acoustic reflection value associated with the audio signal. 12. The transaction device of claim 4 , wherein the non-standard signal is a modified UART signal and the response value is a data response associated with the modified UART signal. 13. A method of detecting an attempt to tamper with a contact interface of a transaction device, the method comprising: providing a monitoring system of the transaction device coupled to a contact interface, wherein the monitoring system and the contact interface are coupled to a processing unit of the transaction device; sending, with the monitoring system, a non-standard signal to one or more components of the contact interface; measuring, by the monitoring system, a response value for the non-standard signal; transmitting, via a communication interface of the transaction device, the response value to a payment service system; determining, by the processing unit, whether one or more local tamper criteria are satisfied based on the response value; and identifying a tamper attempt when the one or more local tamper criteria are satisfied. 14. The method of claim 13 , wherein the one or more local tamper criteria are based on one or more communications received from the payment service system. 15. The method of claim 13 , further comprising: receiving, via the communication interface, a tamper determination message, wherein the tamper determination message is generated by the payment service system based on the response value; and identifying the tamper attempt based on the tamper determination message. 16. The method of claim 13 , wherein the local tamper criteria comprise one or more baseline values, and wherein determining whether one or more local tamper criteria are satisfied based on the response value comprises comparing the response value to the one or more baseline values. 17. The method of claim 13 , further comprising: receiving, via the communication interface, a local tamper criteria update message, wherein the local tamper criteria update message is generated by the payment service system based on response values received from a plurality of transaction devices; and updating the local tamper criteria based on the local tamper criteria update message. 18. The method of claim 13 , wherein the non-standard signal is a capacitance measurement signal and the response value is a capacitance value associated with the capacitance measurement signal. 1

Assignees

Inventors

Classifications

  • G06Q20/341Primary

    Active cards, i.e. cards including their own processing means, e.g. including an IC or chip · CPC title

  • by detecting the presence of a surveillance, interception or detection · CPC title

  • by jamming · CPC title

  • Online card verification · CPC title

  • Card having specific functional components · CPC title

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Frequently asked questions

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What does patent US10438189B2 cover?
A payment processing device can implement a monitoring system to detect for tamper attempts at a physical interface such as a chip card interface. The monitoring system can establish local tamper criteria including a baseline when no chip card is present in the chip card interface, or in some embodiments, when it is known that an authentic chip card is present in the slot. During subsequent eva…
Who is the assignee on this patent?
Square Inc
What technology area does this patent fall under?
Primary CPC classification G06Q20/341. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Oct 08 2019 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 12 related publications on this page (citations in our corpus or others sharing the same primary CPC).