Communication protocol speedup and step-down

Patent metadata

Field	Value
Publication number	US-9858448-B1
Application number	US-201715420730-A
Country	US
Kind code	B1
Filing date	Jan 31, 2017
Priority date	Jan 31, 2017
Publication date	Jan 2, 2018
Grant date	Jan 2, 2018

Abstract

A payment terminal such as a payment reader may receive and form electrical connections with an electronic transaction card such as an EMV chip card. The payment terminal may provide a clock signal at a rate that exceeds a specified rate for the EMV chip card. The payment terminal may transmit messages to the EMV chip card and monitor receive messages at a data connection. The payment terminal may determine that the clock rate is excessive based on a timeout of a receive message, an error rate of a receive message, or a receive message indicating that one of the transmit messages was not received by the EMV card. The payment terminal may reduce the clock rate to a rate that is below the specified rate for the EMV chip card.

First claim

What is claimed is:

1. A method for an EMV card reader to communicate with an EMV card, the method comprising:
establishing a physical connection between the EMV card reader and the EMV card, wherein the physical connection comprises a power connection, a clock connection, and a data connection;
providing, from the EMV card reader, a power signal to the power connection;
providing, from the EMV card reader, a clock signal to the clock connection at a first clock rate, wherein the first clock rate is greater than a specified clock rate for the EMV card;
providing, from the EMV card reader, one or more transmit messages to the data connection;
monitoring, at the EMV card reader, the data connection for one or more receive messages from the EMV card;
storing, for each receive message that was successfully received, data from the successfully received message in a receive message cache of the EMV card reader;
determining, at the EMV card reader, that the first clock rate is excessive based on the monitoring of the one or more receive messages indicating that the EMV card is unable to correctly respond to the transmit messages when operating at the first clock rate;
identifying, at the EMV card reader, a next transmit message based on the stored data of the receive message cache;
determining, at the EMV card reader, a second clock rate for the clock signal based on the determination that the first clock rate is excessive;
providing, from the EMV card reader, the clock signal to the clock connection at the second clock rate; and
transmitting, from the EMV card reader, one or more additional transmit messages to the EMV card based on the identified next transmit message.

2. The method of claim 1 , wherein the second clock rate is less than or equal to the specified clock rate for the EMV card.

3. The method of claim 1 , wherein the first clock rate is determined to be excessive based on a failure to receive one of the receive messages within a timeout threshold, based on an error rate of one of the receive messages exceeding an error rate threshold, or based on one of the receive messages indicating that one of the transmit messages was not received by the EMV card.

4. The method of claim 1 , wherein the determination of the second clock rate is based on customer information, merchant information, transaction information, location, or environmental information.

5. A method for a transaction processing device to communicate with an externally-driven processing device, the method comprising:
providing, from the transaction processing device, a clock signal to the externally-driven processing device, the clock signal having a first clock rate;
providing, from the transaction processing device, one or more transmit messages to the externally-driven processing device;
monitoring, at the transaction processing device, for one or more receive messages from the externally-driven processing device;
storing, for each receive message that was successfully received, data from the successfully received message in a receive message cache of the transaction processing device;
determining, at the transaction processing device, that the first clock rate is excessive based on the monitoring of the one or more receive messages indicating that the externally-driven processing device is unable to correctly respond to the transmit messages when operating at the first clock rate;
identifying, at the transaction processing device, a next transmit message based on the stored data of the receive message cache;
determining, at the transaction processing device, a second clock rate for the clock signal that is less than the first clock rate based on the determination that the first clock rate is excessive;
providing, from the transaction processing device, the clock signal to the externally-driven processing device at the second clock rate; and
transmitting, from the transaction processing device, one or more additional transmit messages to the externally-driven processing device based on the identified next transmit message.

6. The method of claim 5 , further comprising establishing a physical connection between the transaction processing device and the externally-driven processing device, wherein the physical connection comprises a clock connection and a data connection, wherein the clock signal is provided to the externally-driven processing device via the clock connection, and wherein the receive messages and transmit messages are exchanged between the transaction processing device and the externally-driven processing device via the data connection.

7. The method of claim 6 , wherein establishing the physical connection further comprises establishing a power connection, wherein a power signal is provided to the externally-driven processing device via the power connection.

8. The method of claim 5 , wherein the first clock rate is greater than a specified clock rate for the externally-driven processing device.

9. The method of claim 8 , wherein the second clock rate is less than or equal to the specified clock rate for the externally-driven processing device.

10. The method of claim 5 , wherein the first clock rate is determined to be excessive based on a failure to receive one of the receive messages within a timeout threshold, based on an error rate of one of the receive messages exceeding an error rate threshold, or based on one of the receive messages indicating that one of the transmit messages was not received by the externally-driven processing device.

11. The method of claim 5 , wherein the determination of the second clock rate is based on customer information, merchant information, transaction information, location, or environmental information.

12. The method of claim 5 , wherein the stored data of the receive message cache comprises the one or more receive messages or payload data from the one or more receive messages.

13. The method of claim 5 , further comprising
receiving, at the transaction processing device, one or more additional receive messages after providing the clock signal at the second clock rate;
determining, at the transaction processing device, that the clock rate of the clock signal may be increased based on the one or more additional receive messages;
determining, at the transaction processing device, a third clock rate for the clock signal that is greater than the second clock rate based on the determination that the clock rate may be increased; and
providing, from the transaction processing device, the clock signal to the externally-driven processing device at the third clock rate.

14. A system for processing transactions with an externally-driven processing device, the system comprising:
a clock interface that provides a clock signal to the externally-driven processing device;
a communication interface that exchanges one or more transmit messages and one or more receive messages with the externally-driven processing device;
a memory having instructions stored thereon and a receive message cache;
a processing unit coupled to the clock interface, the communication interface, and the memory, wherein the processing unit executes the instructions to:
provide the clock signal to the externally-driven processing device at a first clock rate;
provide one or more transmit messages to the externally-driven processing device;
monitor for one or more receive messages from the externally-driven processing device;
store, for each receive message that was successfully received, data from the successfully received message in the receive message cache;
determine that the first clock rate is excessive based on the monit

Assignees

• Square Inc

Inventors

• Terra David
• Glashan Ross

Classifications

• G06K19/0701

  at least one of the integrated circuit chips comprising an arrangement for power management · CPC title

• G06K7/016 Primary

  Synchronisation of sensing process · CPC title

• G06K7/06

  by means which conduct current when a mark is sensed or absent, e.g. contact brush for a conductive mark · CPC title