Method, apparatus, system for optimized work submission to an accelerator work queue

Patent metadata

Field	Value
Publication number	US-10437616-B2
Application number	US-201615396529-A
Country	US
Kind code	B2
Filing date	Dec 31, 2016
Priority date	Dec 31, 2016
Publication date	Oct 8, 2019
Grant date	Oct 8, 2019

Abstract

Aspects of the embodiments are directed to systems and methods performed by a virtual shared work queue (VSWQ). The VSWQ can receive an enqueue command (ENQCMD/S) destined for a shared work queue of a peripheral device. The VSWQ can determine a value of a credit counter for the shared work queue, wherein a credit of the credit counter represents an availability of the shared work queue to accept the enqueue command. The VSWQ can respond to the enqueue command based on the value of the credit counter.

First claim

What is claimed is:

1. A method performed by a virtual shared work queue, the method comprising:
receiving, at the virtual shared work queue maintained by an input/output (I/O) bridge, an enqueue command from a core processor and destined for a shared work queue of a peripheral device, the enqueue command comprising a work submission destined for the peripheral device coupled to the I/O bridge;
determining a value of a credit counter for the shared work queue, wherein a credit of the credit counter represents an availability of the shared work queue to accept the enqueue command, the credit counter maintained by the virtual shared work queue; and
responding, from the virtual shared work queue I/O bridge, to the enqueue command based on the value of the credit counter with one of a success flag indicating a successful enqueue command to the shared work queue or a retry flag indicating an unsuccessful enqueue command to the shared work queue;
wherein:
determining the value of the credit counter comprises determining that the credit counter comprises at least one credit,
responding to the enqueue command comprises providing a success message to a processor core that the shared work queue accepts the enqueue command;
the method further comprising:
decrementing the at least one credit;
receiving a completion message from the shared work queue; and
incrementing the credit counter.

2. The method of claim 1 , further comprising:
determining a capacity of the shared work queue; and
initializing the credit counter with a number of credits based, at least in part, on the capacity of the shared work queue.

3. The method of claim 1 , further comprising forwarding the enqueue command to the shared work queue.

4. The method of claim 1 , wherein determining the value of the credit counter comprises determining that the credit counter comprises zero credits; and wherein:
responding to the enqueue command comprises responding to the enqueue command with a retry indication.

5. At least one non-transitory machine accessible storage medium having code stored thereon, the code when executed on a machine, causes the machine to:
receive, from a core processor coupled to the I/O bridge and by a virtual shared work queue at an input/output (I/O) bridge, a work submission destined for a peripheral device coupled to the I/O bridge;
determine a value of a credit counter representing a capacity of a shared work queue for the peripheral device, the credit counter maintained by the virtual shared work queue; and
respond to the request based on the value of the credit counter, with one of a success flag indicating a successful enqueue command to the shared work queue or a retry flag indicating an unsuccessful enqueue command to the shared work queue;
the code when executed to cause the machine to:
determine that the credit counter comprises at least one credit;
provide a success message to a core processor that the shared work queue can accept the request;
decrement the at least one credit; and
increment the credit counter upon receiving a success or retry message from the shared work queue.

6. The at least one machine accessible storage medium of claim 5 , wherein the work submission comprises an enqueue command and a memory mapped input/output (MMIO) address of the shared work queue.

7. The at least one machine accessible storage medium of claim 5 , further comprising code that when executed causes the machine to determine a capacity of the shared work queue; and initialize the credit counter with a number of credits based, at least in part, on the capacity of the shared work queue.

8. The at least one machine accessible storage medium of claim 5 , further comprising code that when executed causes the machine to, forward the enqueue command to the shared work queue.

9. The at least one machine accessible storage medium of claim 5 , further comprising code that when executed causes the machine to determine that the shared work queue does not have at least one credit; and respond to the enqueue command with a retry flag.

10. A system comprising:
a data link comprising a plurality of lanes;
a peripheral device; and
a root complex communicatively coupled to the peripheral device using the data link, the root complex comprising logic implemented at least partially in hardware to:
receive, at the virtual shared work queue maintained by an input/output (I/O) bridge, an enqueue command from a core processor and with a work submission destined for the peripheral device coupled to the I/O bridge, the request comprising an enqueue command;
determine an availability of the shared work queue to process the enqueue command based, at least in part, on a value of a credit counter associated with the shared work queue, the credit counter maintained by the virtual shared work queue; and
respond, from the virtual shared work queue I/O bridge, to the enqueue command based on the availability of the shared work queue with one of a success flag indicating a successful enqueue command to the shared work queue or a retry flag indicating an unsuccessful enqueue command to the shared work queue;
the root complex comprising logic to:
determine that a credit counter for the shared work queue comprises at least one credit; and
provide a success message to a core processor that the shared work queue can accept the enqueue command;
decrement the at least one credit; and
receive a completion message from the shared work queue; and

increment the credit counter.

11. The system of claim 10 , the root complex comprising logic to determine a capacity of the shared work queue; and initialize a credit counter associated with the shared work queue with a number of credits based, at least in part, on the capacity of the shared work queue.

12. The system of claim 10 , the root complex comprising logic to forward the enqueue command to the shared work queue, the shared work queue configured to execute a write transaction to the peripheral device to process the work submission.

13. The system of claim 10 , the root complex comprising logic to determine that the credit counter does not have at least one credit; and respond to the enqueue command with a retry flag.

14. The system of claim 10 , wherein the peripheral device comprises the shared work queue, the shared work queue providing a command interface in the peripheral device accessible by software clients utilizing the root complex.

15. The system of claim 10 , wherein the root complex comprises an input/output bridge, the input/output bridge comprising logic to determine an availability of the shared work queue to process the enqueue command based, at least in part, on a value of a credit counter associated with the shared work queue; and respond to the enqueue command based on the availability of the shared work queue.

16. The system of claim 10 , wherein the peripheral device comprises an accelerator.

Assignees

• Intel Corp

Inventors

• Agarwal Ishwar
• Sankaran Rajesh
• Van Doren Stephen

Classifications

• G06F9/455 Primary

  Emulation; Interpretation; Software simulation, e.g. virtualisation or emulation of application or operating system execution engines · CPC title

• G06F9/505 Primary

  considering the load · CPC title