Synthetic test circuit for testing submodule performance in power compensator and test method thereof

Patent metadata

Field	Value
Publication number	US-10436844-B2
Application number	US-201715683544-A
Country	US
Kind code	B2
Filing date	Aug 22, 2017
Priority date	Nov 11, 2016
Publication date	Oct 8, 2019
Grant date	Oct 8, 2019

Abstract

A synthetic test circuit for testing a submodule performance in a power compensator includes a submodule test unit which is an object of testing the submodule performance, a current source and a controller. The current source is connected to the submodule test unit to supply a voltage to the submodule test unit such that a charging voltage having a capacity set in the submodule test unit is stored in order to operate the submodule test unit. The controller is configured to perform control to perform a submodule performance test of the submodule test unit using the stored charging voltage.

First claim

What is claimed is:

1. A synthetic test circuit for testing a submodule performance in a power compensator, comprising:
a submodule test unit which includes a capacitor and is an object of testing the submodule performance;
a current source connected to the submodule test unit to supply a voltage to the capacitor of the submodule test unit such that a preset charging voltage is stored in the capacitor in order to operate the submodule test unit; and
a controller configured to test the submodule performance of the submodule test unit using the stored preset charging voltage,
wherein the submodule test unit is configured to store the voltage supplied by the current source in the capacitor as the preset charging voltage before the test of the submodule performance, and generate a test current using the preset charging voltage stored in the capacitor, and
wherein, if loss is generated in the test current during the test of the submodule performance, the current source supplies an extra voltage to the submodule test unit.

2. The synthetic test circuit according to claim 1 , further comprising:
a test current adjuster connected between the current source and the submodule test unit to adjust the test current.

3. The synthetic test circuit according to claim 2 , wherein the test current adjuster includes:
a first inductor connected between the current source and the submodule test unit;
a second inductor connected to the first inductor in series; and
a switch connected to the second inductor in parallel.

4. The synthetic test circuit according to claim 3 ,
wherein, when the switch is opened, the submodule performance test of a rated voltage is performed, and
wherein, when the switch is closed, the submodule performance test of a low voltage is performed.

5. The synthetic test circuit according to claim 1 ,
wherein the submodule test unit includes at least one or more submodules connected to each other in series, each of the submodules includes:
a switching unit including first to fourth switches controlled by the controller and first to fourth diodes respectively connected to the first to fourth switches in antiparallel; and
a capacitor connected to the switching unit.

6. The synthetic test circuit according to claim 5 ,
wherein the switching unit includes:
a first switch pair connected between first and fourth nodes; and
a second switch pair connected to the first switch pair in parallel between the first and fourth nodes,

wherein the first switch pair includes:
the first switch connected between the first node and a second node; and
the second switch connected between the second node and the fourth node,

wherein the second switch pair includes:
the third switch connected between the first node and a third node; and
the fourth switch connected between the third node and the fourth node, and

wherein the capacitor is connected between the first node and the fourth node.

7. The synthetic test circuit according to claim 6 , wherein the controller controls switching of the first to fourth switches to generate the test current using the preset charging voltage stored in the capacitor, during the test of the submodule performance.

8. The synthetic test circuit according to claim 7 , wherein the controller controls switching of the first to fourth switches such that the test current has an alternating current (AC) waveform.

9. The synthetic test circuit according to claim 1 , wherein the current source includes:
a rectifier configured to rectify a three-phase AC voltage to a DC voltage;
a ripple remover configured to remove ripple included in the DC voltage; and
a loss compensator configured to supply a loss compensation component for compensating for loss which occurs in the test current during the test of the submodule performance.

10. The synthetic test circuit according to claim 9 , wherein the loss compensator is an inverter.

11. The synthetic test circuit according to claim 9 , wherein average output power of the current source is expressed by the following equation:
< P INV >=1/ T×∫ Ts ( i test ( t )× V INV ( t )) dt

where, Ts denotes an integral period in which the loss compensation component is provided, i test denotes the test current and an output voltage V INV denotes the loss compensator component of the loss compensator.

12. The synthetic test circuit according to claim 11 , wherein the integral period is (T/2−Ts) to T/2 or (T−Ts) to T (T being a period of the test current).

13. A test method of a synthetic test circuit for testing a submodule performance in a power compensator including a submodule test unit which includes a capacitor and is an object of testing the submodule performance, a current source connected to the submodule test unit and a controller, the test method comprising:
supplying, by the current source, a voltage to the capacitor of the submodule test unit such that a preset charging voltage is stored in the capacitor in order to operate the submodule test unit;
storing, by the submodule test unit, the voltage supplied by the current source in the capacitor as the preset charging voltage before the test of the submodule performance;
operating, by the controller, the submodule test unit using the stored preset charging voltage;
generating, by the submodule test unit, a test current based on the preset charging voltage stored in the capacitor;
testing, by the controller, the submodule performance using the test current; and
if loss is generated in the test current during the test of the submodule performance, supplying, by the current source, an extra voltage to the submodule test unit.

14. The test method according to claim 13 ,
wherein the synthetic test circuit for testing the submodule performance in the power compensator further includes a test current adjuster connected between the current source and the submodule test unit,
wherein the test current adjuster includes:
a first inductor connected between the current source and the submodule test unit;
a second inductor connected to the first inductor in series; and
a switch connected to the second inductor in parallel,

wherein the test method further comprises:
opening the switch to perform the submodule performance test of a rated voltage; and
closing the switch to perform the submodule performance test of a low voltage.

15. The test method according to claim 13 , wherein the supplying the extra voltage further comprises:
generating a loss compensation component for compensating for loss in the current source if loss occurs in the test current during the test of the submodule performance of the submodule test unit,
wherein the loss compensation component is an output voltage output from the current source during a predetermined portion of a half period of the test current.

Assignees

• Lsis Co Ltd
• Nat Univ Pukyong Ind Univ Coop Found

Inventors

• Chung Yong Ho
• Baek Seung Taek
• Kim Young Woo
• Lee Jin Hee
• Nho Eui Cheol
• Jung Jae Hun

Classifications

• G01R31/2839

  using signal generators, power supplies or circuit analysers (G01R31/2879 takes precedence; multimeters G01R15/12, network analysers G01R27/28) · CPC title

• G01R31/3336 Primary

  Synthetic testing, i.e. with separate current and voltage generators simulating distance fault conditions · CPC title

• H02M3/158

  including plural semiconductor devices as final control devices for a single load · CPC title

• G01R31/282 Primary

  Testing of electronic circuits specially adapted for particular applications not provided for elsewhere (G01R31/2801 and G01R31/2851 take precedence) · CPC title

• G01R19/2513

  Arrangements for monitoring electric power systems, e.g. power lines or loads; Logging · CPC title