Dynamic detection and prediction for store-dependent branches

Patent metadata

Field	Value
Publication number	US-10430198-B2
Application number	US-201815870595-A
Country	US
Kind code	B2
Filing date	Jan 12, 2018
Priority date	Jan 12, 2018
Publication date	Oct 1, 2019
Grant date	Oct 1, 2019

Abstract

One embodiment provides an apparatus. The apparatus includes a store direct dependent (SDD) branch prediction circuitry and an SDD management circuitry. The store direct dependent (SDD) branch prediction circuitry is to store an SDD branch table. The SDD branch table is to store at least one record. Each record includes a branch instruction pointer (IP) field, a load IP field, a store IP field, a comparison info field and at least one of a store value field and/or a predicted outcome field. The SDD management circuitry is to populate the SDD branch table at runtime and to override a baseline branch prediction associated with an incoming branch IP with an SDD branch prediction, if the SDD branch table contains a first record populated with the incoming branch IP and at least one of a store value and/or an SDD predicted outcome.

First claim

What is claimed is:

1. An apparatus comprising:
a store direct dependent (SDD) branch prediction circuitry to store an SDD branch table, the SDD branch table to store at least one record, each record comprising a branch instruction pointer (IP) field, a load IP field, a store IP field, a comparison info field and at least one of a store value field and/or a predicted outcome field; and
an SDD management circuitry to populate the SDD branch table at runtime and to override a baseline branch prediction associated with an incoming branch IP with an SDD branch prediction, if the SDD branch table contains a first record populated with the incoming branch IP and at least one of a store value and/or an SDD predicted outcome.

2. The apparatus of claim 1 , wherein the first record is populated with a store IP and the SDD management circuitry is to determine the SDD branch prediction based, at least in part, on a store value associated with the store IP.

3. The apparatus of claim 1 , wherein the populating the SDD branch table comprises querying a memory renaming (MRN) circuitry using a load IP of a load instruction to determine a store IP of a store instruction, the store value associated with the store instruction.

4. The apparatus of claim 1 , wherein the populating the SDD branch table comprises determining a load IP of a load instruction based, at least in part, on a sequence of instructions preceding a SDD branch instruction, the load instruction to load a load value into a register, the load instruction related to a compare instruction that precedes the branch instruction in the sequence of instructions, the load value governing a branch outcome.

5. The apparatus of claim 1 , wherein the comparison info field is to contain one or more of a compare value, an indication whether a compare operation is between a store value and a compare value or between two store values and/or a compare condition.

6. The apparatus of claim 1 , wherein the predicted outcome field is to store the predicted outcome or a pointer to a first in first out (FIFO) queue, the FIFO queue to store a plurality of SDD predicted outcomes associated with a respective one branch IP.

7. The apparatus of claim 1 , wherein a selected record comprises a first load IP field, a first store IP field, a second load IP field, a second store IP field and the predicted outcome field or a first store value field and a second store value field, the predicted outcome determined based, at least in part, on a comparison of a first store value and a second store value.

8. The apparatus of claim 1 , wherein the SDD management circuitry is to erase the predicted outcome or pop a value from a first in first out (FIFO) queue, if the baseline branch instruction is overridden.

9. A method comprising:
storing, by a store direct dependent (SDD) branch prediction circuitry, an SDD branch table, the SDD branch table to store at least one record, each record comprising a branch instruction pointer (IP) field, a load IP field, a store IP field, a comparison info field and at least one of a store value field and/or a predicted outcome field; and
populating, by an SDD management circuitry, the SDD branch table at runtime and overriding, by the SDD management circuitry, a baseline branch prediction associated with an incoming branch IP with an SDD branch prediction, if the SDD branch table contains a first record populated with the incoming branch IP and at least one of a store value and/or an SDD predicted outcome.

10. The method of claim 9 , wherein the first record is populated with a store IP and further comprising determining, by the SDD management circuitry, the SDD branch prediction based, at least in part, on a store value associated with the store IP.

11. The method of claim 9 , wherein the populating the SDD branch table comprises querying a memory renaming (MRN) circuitry using a load IP of a load instruction to determine a store IP of a store instruction, the store value associated with the store instruction.

12. The method of claim 9 , wherein the populating the SDD branch table comprises determining a load IP based, at least in part, on a sequence of instructions preceding a SDD branch instruction, the load instruction to load a load value into a register, the load instruction related to a compare instruction that precedes the branch instruction in the sequence of instructions, the load value governing a branch outcome.

13. The method of claim 9 , wherein the comparison info field is to contain one or more of a compare value, an indication whether a compare operation is between a store value and a compare value or between two store values and/or a compare condition.

14. The method of claim 9 , wherein the predicted outcome field is to store the predicted outcome or a pointer to a first in first out (FIFO) queue, the FIFO queue to store a plurality of SDD predicted outcomes associated with a respective one branch IP.

15. The method of claim 9 , wherein a selected record comprises a first load IP field, a first store IP field, a second load IP field, a second store IP field and the predicted outcome field or a first store value field and a second store value field, the predicted outcome determined based, at least in part, on a comparison of a first store value and a second store value.

16. The method of claim 9 , further comprising erasing, by the SDD management circuitry, the predicted outcome or pop a value from a first in first out (FIFO) queue, if the baseline branch instruction is overridden.

17. A system comprising:
a branch prediction unit;
a store direct dependent (SDD) branch prediction circuitry to store an SDD branch table, the SDD branch table to store at least one record, each record comprising a branch instruction pointer (IP) field, a load IP field, a store IP field, a comparison info field and at least one of a store value field and/or a predicted outcome field; and
an SDD management circuitry to populate the SDD branch table at runtime and to override a baseline branch prediction associated with an incoming branch IP with an SDD branch prediction, if the SDD branch table contains a first record populated with the incoming branch IP and at least one of a store value and/or an SDD predicted outcome.

18. The system of claim 17 , wherein the first record is populated with a store IP and the SDD management circuitry is to determine the SDD branch prediction based, at least in part, on a store value associated with the store IP.

19. The system of claim 17 , wherein the populating the SDD branch table comprises querying a memory renaming (MRN) circuitry using a load IP of a load instruction to determine a store IP of a store instruction, the store value associated with the store instruction.

20. The system of claim 17 , wherein the populating the SDD branch table comprises determining a load IP based, at least in part, on a sequence of instructions preceding a SDD branch instruction, the load instruction to load a load value into a register, the load instruction related to a compare instruction that precedes the branch instruction in the sequence of instructions, the load value governing a branch outcome.

21. The system of claim 17 , wherein the comparison info field is to contain one or more of a compare value, an indication whether a compare operation is between a store value and a compare value or between two store values and/or a compare condition.

22. The system of claim 17 , wherein the predicted outcome field is to store the pred

Assignees

• Intel Corp

Inventors

• Gupta Saurabh
• Pal Rahul
• Soundararajan Niranjan
• Natarajan Ragavendra
• Subramoney Sreenivas

Classifications

• G06F9/3848 Primary

  using hybrid branch prediction, e.g. selection between prediction techniques · CPC title

• G06F9/3844 Primary

  using dynamic branch prediction, e.g. using branch history tables · CPC title

• G06F9/3806

  using address prediction, e.g. return stack, branch history buffer · CPC title

• G06F9/3861

  Recovery, e.g. branch miss-prediction, exception handling (error detection or correction G06F11/00) · CPC title

• G06F9/3859

  Physics · mapped topic