Clock comparator sign control

Patent metadata

Field	Value
Publication number	US-10423191-B2
Application number	US-201715409601-A
Country	US
Kind code	B2
Filing date	Jan 19, 2017
Priority date	Jan 19, 2017
Publication date	Sep 24, 2019
Grant date	Sep 24, 2019

Abstract

A clock comparator sign control is used in a compare operation. A clock comparator sign control that determines whether unsigned arithmetic or signed arithmetic is to be used in a comparing operation is obtained. The clock comparator sign control is then used in a comparison of a value of a clock comparator and at least a portion of a value of a time-of-day clock to determine whether a selected action is to be recognized.

First claim

What is claimed is:

1. A computer program product for facilitating processing in a computing environment, said computer program product comprising:
a computer readable storage medium readable by a processing circuit and storing instructions to perform a method comprising:
obtaining a clock comparator sign control to be used to determine whether unsigned arithmetic or signed arithmetic is to be used in a comparing operation;
using the clock comparator sign control in a comparison of a value of a clock comparator and at least a portion of a value of a time-of-day clock to determine whether a selected action is to be recognized, wherein the using the clock comparator sign control in the comparison results in correctly indicating whether the selected action is to be recognized, regardless of whether the time-of-day clock has overflowed; and
performing, by a processor, based on the comparison, the selected action.

2. The computer program product of claim 1 , wherein based on the clock comparator sign control being set to a first value, unsigned binary arithmetic is to be used in the comparison, the first value being a default value to provide compatibility for operating systems at various levels.

3. The computer program product of claim 2 , wherein based on the clock comparator sign control being set to a second value, signed binary arithmetic is to be used in the comparison.

4. The computer program product of claim 1 , wherein the selected action is an interruption of processing within the computing environment.

5. The computer program product of claim 1 , wherein the clock comparator is one size and the time-of-day clock is an extended time-of-day clock of a different size than the clock comparator, and wherein the time-of-day clock may overflow.

6. The computer program product of claim 1 , wherein the clock comparator sign control is located in a control register.

7. The computer program product of claim 1 , wherein the clock comparator is implemented as a clock comparator register and the time-of-day clock is implemented as a time-of-day clock register.

8. The computer program product of claim 1 , wherein the method further comprises using the clock comparator sign control to specify what constitutes a discontinuity in a compared portion of the time-of-day clock.

9. A computer system for facilitating processing in a computing environment, said computer system comprising:
a memory; and
a processor in communication with the memory, wherein the computer system is configured to perform a method, said method comprising:
obtaining a clock comparator sign control to be used to determine whether unsigned arithmetic or signed arithmetic is to be used in a comparing operation;
using the clock comparator sign control in a comparison of a value of a clock comparator and at least a portion of a value of a time-of-day clock to determine whether a selected action is to be recognized, wherein the using the clock comparator sign control in the comparison results in correctly indicating whether the selected action is to be recognized, regardless of whether the time-of-day clock has overflowed; and
performing, by the processor, based on the comparison, the selected action.

10. The computer system of claim 9 , wherein based on the clock comparator sign control being set to a first value, unsigned binary arithmetic is to be used in the comparison, the first value being a default value to provide compatibility for operating systems at various levels.

11. The computer system of claim 10 , wherein based on the clock comparator sign control being set to a second value, signed binary arithmetic is to be used in the comparison.

12. The computer system of claim 9 , wherein the selected action is an interruption of processing within the computing environment.

13. The computer system of claim 9 , wherein the clock comparator is one size and the time-of-day clock is an extended time-of-day clock of a different size than the clock comparator, and wherein the time-of-day clock may overflow.

14. The computer system of claim 9 , wherein the method further comprises using the clock comparator sign control to specify what constitutes a discontinuity in a compared portion of the time-of-day clock.

15. A computer-implemented method of facilitating processing in a computing environment, said computer-implemented method comprising:
obtaining, by a processor, a clock comparator sign control to be used to determine whether unsigned arithmetic or signed arithmetic is to be used in a comparing operation;
using the clock comparator sign control in a comparison of a value of a clock comparator and at least a portion of a value of a time-of-day clock to determine whether a selected action is to be recognized, wherein the using the clock comparator sign control in the comparison results in correctly indicating whether the selected action is to be recognized, regardless of whether the time-of-day clock has overflowed; and
performing, by the processor, based on the comparison, the selected action.

16. The computer-implemented method of claim 15 , wherein based on the clock comparator sign control being set to a first value, unsigned binary arithmetic is to be used in the comparison, the first value being a default value to provide compatibility for operating systems at various levels.

17. The computer-implemented method of claim 16 , wherein based on the clock comparator sign control being set to a second value, signed binary arithmetic is to be used in the comparison.

18. The computer-implemented method of claim 15 , wherein the clock comparator is one size and the time-of-day clock is an extended time-of-day clock of a different size than the clock comparator, and wherein the time-of-day clock may overflow.

19. The computer-implemented method of claim 15 , wherein the selected action is an interruption of processing within the computing environment.

20. The computer-implemented method of claim 15 , further comprising using the clock comparator sign control to specify what constitutes a discontinuity in a compared portion of the time-of-day clock.

Assignees

• IBM

Inventors

• Engler Eberhard
• Greiner Dan F
• Hack Michel H T
• Slegel Timothy J
• Von Buttlar Joachim

Classifications

• G06F8/78

  Methods to solve the "Year 2000" [Y2K] problem · CPC title

• G06F9/4812 Primary

  by interrupt, e.g. masked · CPC title

• G06F9/3001 Primary

  Arithmetic instructions · CPC title

• G06F1/14 Primary

  Time supervision arrangements, e.g. real time clock · CPC title