Semiconductor device
US-2024421022-A1 · Dec 19, 2024 · US
Ion-implanted thermal barrier
US10418304B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-10418304-B2 |
| Application number | US-201816107470-A |
| Country | US |
| Kind code | B2 |
| Filing date | Aug 21, 2018 |
| Priority date | Aug 28, 2017 |
| Publication date | Sep 17, 2019 |
| Grant date | Sep 17, 2019 |
How to read this patent
A practical reading order for non-experts. Skip the full description unless you need deep technical detail.
- Title
What the patent document calls the invention.
- Abstract
A short plain-language summary of the technical disclosure.
- Assignees and inventors
Who owns or filed the patent and who is credited as inventor.
- Key dates
Filing, priority, publication, and grant dates set the timeline.
- First independent claim
The legal scope of protection — read this for what is actually claimed.
- CPC / IPC classifications
Technology tags used to group this patent with similar filings.
- Citations and related patents
Prior art links and similar publications in this corpus.
Abstract
Official abstract text for this publication.
Ion implantation can be used to define a thermal dissipation path that allows for better thermal isolation between devices in close proximity on a microelectronics chip, thus providing a means for higher device density combined with better performance.
First claim
Opening claim text (preview).
We claim: 1. An ion-implanted thermal barrier, comprising an ion-implanted region between a hot device and a cool device on a substrate. 2. The ion-implanted thermal barrier of claim 1 , wherein the implanted ion comprises a noble gas ion. 3. The ion-implanted thermal barrier of claim 2 , wherein the noble gas ion comprises krypton or xenon. 4. The ion-implanted thermal barrier of claim 1 , wherein the substrate comprises silicon, silicon carbide, diamond, gallium nitride, or gallium arsenide. 5. The ion-implanted thermal barrier of claim 1 , wherein the dose of the ion implant is greater than 1×10 15 ions/cm 2 . 6. The ion-implanted thermal barrier of claim 1 , wherein the substrate comprises a microelectronic chip. 7. The ion-implanted thermal barrier of claim 1 , wherein the range of the implanted ion is less than the thickness of the substrate. 8. The ion-implanted thermal barrier of claim 1 , wherein the range of the implanted ion is greater than the depth of the hot device or the cold device in the substrate.
Assignees
Inventors
Classifications
using cavities formed by hydrogen or noble gas ion implantation · CPC title
Gettering within semiconductor bodies · CPC title
into semiconductor materials, e.g. for doping · CPC title
- H10W40/00Primary
Arrangements for thermal protection or thermal control (integrated devices comprising arrangements for thermal protection H10D89/60) · CPC title
- H10W40/25Primary
characterised by their materials · CPC title
Patent family
Related publications grouped by family.
External sources
Frequently asked questions
Answers are generated from the same data shown on this page.
- What does patent US10418304B2 cover?
- Ion implantation can be used to define a thermal dissipation path that allows for better thermal isolation between devices in close proximity on a microelectronics chip, thus providing a means for higher device density combined with better performance.
- Who is the assignee on this patent?
- Nat Tech & Eng Solutions Sandia Llc, Univ Virginia Patent Foundation
- What technology area does this patent fall under?
- Primary CPC classification H10W40/00. Mapped technology areas include Electricity.
- When was this patent published?
- Publication date Tue Sep 17 2019 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
- What related patents are in patentsdb?
- We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).