Method of making metal substrates with structures formed therein
US-2024404922-A1 · Dec 5, 2024 · US
US9214403B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9214403-B2 |
| Application number | US-201313896472-A |
| Country | US |
| Kind code | B2 |
| Filing date | May 17, 2013 |
| Priority date | Jan 20, 2010 |
| Publication date | Dec 15, 2015 |
| Grant date | Dec 15, 2015 |
A practical reading order for non-experts. Skip the full description unless you need deep technical detail.
What the patent document calls the invention.
A short plain-language summary of the technical disclosure.
Who owns or filed the patent and who is credited as inventor.
Filing, priority, publication, and grant dates set the timeline.
The legal scope of protection — read this for what is actually claimed.
Technology tags used to group this patent with similar filings.
Prior art links and similar publications in this corpus.
Official abstract text for this publication.
A stacked semiconductor package including a first printed circuit board and a second printed circuit board is provided. The first printed circuit board may include a first surface upon which a first semiconductor chip is mounted and a second surface upon which at least one connecting structure is attached. The first printed circuit board may further include at least one thermal via and a heat sink and the at least one thermal via and the heat sink may be disposed under the first semiconductor chip with the heat sink being disposed between the first surface and the second surface. The second printed circuit board may include a third surface upon which a second semiconductor chip is mounted. The second printed circuit board may be disposed under the first printed circuit board with the at least one connecting structure connecting the first printed circuit board to the second printed circuit board.
Opening claim text (preview).
What is claimed is: 1. A stacked semiconductor package comprising: a first printed circuit board including a first surface upon which a first semiconductor chip is mounted and a second surface upon which at least one connecting structure is attached, the first printed circuit board further including a heat sink, the heat sink being disposed under the first semiconductor chip, wherein the first semiconductor chip and the first printed circuit board are electrically connected; a…
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Related publications grouped by family.
Free tools are coming soon. Tell us what you want to track and we'll notify you.
Answers are generated from the same data shown on this page.