Method to neutralize incorrectly oriented printed diodes

Patent metadata

Field	Value
Publication number	US-10412833-B2
Application number	US-201816135982-A
Country	US
Kind code	B2
Filing date	Sep 19, 2018
Priority date	Sep 27, 2017
Publication date	Sep 10, 2019
Grant date	Sep 10, 2019

Abstract

A programmable circuit includes an array of printed groups of microscopic transistors or diodes having pn junctions. The devices are pre-formed and printed as an ink and cured. The devices have a proper orientation and a reverse orientation after settling on a conductor layer. The devices are connected in parallel within small groups. To neutralize the reverse-oriented devices, a sufficient voltage is applied across the parallel-connected diodes to forward bias only the devices having the reverse orientation. This causes a sufficient current to flow through each of the reverse-orientated devices to destroy an electrical interface between an electrode of the devices and the conductor layer to create an open circuit, such that those devices do not affect a rectifying function of the devices in the group having the proper orientation. An interconnection conductor pattern may then interconnect the groups to form complex logic circuits.

First claim

What is claimed is:

1. A method for forming a circuit comprising:
printing pre-formed devices having a pn junction on a first conductor, the devices having a first electrode and a second electrode, wherein the devices are printed as an ink and have a proper orientation and a reverse orientation after settling on the first conductor;
curing the ink such that one of the first electrode and second electrode, depending on the devices' orientations, electrically contacts the first conductor;
depositing a second conductor over the devices such that the other of the first electrode and second electrode electrically contacts the second conductor, wherein groups of the devices are electrically connected in parallel by the first conductor and second conductor; and
applying a sufficient voltage across the first conductor and second conductor to forward bias the devices having the reverse orientation, causing a sufficient current to flow through each of the devices having the reverse orientation to create an open circuit, such that the devices having the reverse orientation do not affect a rectifying function of the devices having the proper orientation.

2. The method of claim 1 wherein the step of printing the pre-formed devices comprises printing the pre-formed devices in groups such that all devices having the proper orientation are electrically connected in parallel within each group.

3. The method of claim 1 wherein the step of applying the sufficient voltage comprises coupling a controllable current source to the first conductor and the second conductor.

4. The method of claim 1 wherein the step of applying the sufficient voltage comprises coupling a controllable voltage source to the first conductor and the second conductor.

5. The method of claim 1 wherein the first electrode of the devices is formed on a first surface of the device and comprises an electrode extending from the first surface that is narrower than a body of the device, and wherein the second electrode is formed on a second surface of the device that covers the second surface, wherein the proper orientation of the device is when the second electrode faces the first conductor.

6. The method of claim 1 wherein applying the sufficient voltage comprises raising a current through the reverse oriented devices until heat at an interface of one of the first electrode and the second electrode and one of the first conductor and second conductor causes the open circuit.

7. The method of claim 1 further comprising depositing a fuse layer, wherein a portion of the fuse layer melts during the step of applying the sufficient voltage to cause the open circuit.

8. The method of claim 1 wherein the circuit comprises a programmable circuit, wherein the step of printing the pre-formed devices comprises printing the pre-formed devices in groups such that all devices having the proper orientation are electrically connected in parallel within each group, the method further comprising:
interconnecting the groups of devices to form a logic circuit.

9. The method of claim 8 further comprising:
forming one or more input terminals for receiving input signals;
forming one or more output terminals for outputting output signals; and
interconnecting the pre-formed devices to perform an electrical function on the input signals to generated the output signals.

10. The method of claim 1 wherein the step of printing the pre-formed devices comprises printing the pre-formed devices in groups such that all devices having the proper orientation are electrically connected in parallel within each group, and wherein each group is formed as a dot containing a plurality of the devices.

11. The method of claim 1 wherein the devices comprise diodes.

12. The method of claim 1 wherein the devices comprise transistors.

13. The method of claim 1 wherein the first conductor and the second conductor are connected to leads, and the step of applying the sufficient voltage comprises applying the sufficient voltage to the leads.

14. A circuit comprising:
a substrate;
a plurality of separate groups of pre-formed, semiconductor electrical devices that have been mixed in a first solution, deposited over the substrate, and cured;
the devices containing a pn junction;
each group containing a plurality of substantially identical electrical devices sandwiched between a first conductor and a second conductor, the electrical devices being randomly distributed within each group on the substrate;
some of the groups containing devices having a proper orientation and a reverse orientation; and
wherein the reverse-oriented devices form an open circuit such that only the devices with the proper orientation within each group are electrically connected in parallel by the first conductor and the second conductor.

15. The circuit of claim 14 further comprising a fuse layer that forms an open circuit only for the devices having the reverse orientation.

16. The circuit of claim 14 wherein the open circuit comprises an interface between an electrode of the reverse-oriented devices and one of the first conductor and second conductor having been melted away by heat generated by a current through the reverse-oriented devices.

17. The circuit of claim 14 wherein a first electrode of the devices extends from a first surface that is narrower than a body of the device, and wherein a second electrode is formed on a second surface of the device that covers the second surface, wherein the proper orientation of the device is when the second electrode faces the first conductor.

18. The circuit of claim 14 wherein the circuit comprises a programmable circuit, wherein the groups of devices are interconnectable to form a digital circuit.

19. The circuit of claim 18 further comprising:
one or more input terminals for receiving input signals;
one or more output terminals for outputting output signals; and
the groups of devices being interconnected to be part of a digital circuit that performs an electrical function on the input signals to generated the output signals.

20. The circuit of claim 14 wherein the devices comprise diodes.

Assignees

• Nthdegree Tech Worldwide Inc

Inventors

• Blanchard Richard Austin
• Ray William Johnstone

Classifications

• H10W72/0198

  batch processes · CPC title

• H10W72/874

  On different surfaces · CPC title

• H10W72/07331

  Connecting techniques · CPC title

• H10W72/073

  of die-attach connectors · CPC title

• H10W70/093

  Connecting or disconnecting other interconnections thereto or therefrom, e.g. connecting bond wires or bumps · CPC title