Display device

Patent metadata

Field	Value
Publication number	US-10411083-B2
Application number	US-201816111908-A
Country	US
Kind code	B2
Filing date	Aug 24, 2018
Priority date	Sep 29, 2017
Publication date	Sep 10, 2019
Grant date	Sep 10, 2019

Abstract

A display device includes a substrate including a first display region, a second display region having an area smaller than that of the first display region, a third display region having an area smaller than that of the first display region, and a non-display region, a plurality of pixels provided in the first to third display regions, a power line which is connected to each of the plurality of pixels and applies a first power voltage to the plurality of pixels, and a fan-out line provided in the non-display region, the fan-out line applying a data signal to the plurality of pixels, where the power line includes an additional power line, a first power line, and disposed on the additional power line, and a second power line disposed on the first power line.

First claim

What is claimed is:

1. A display device comprising:
a substrate including:
a first display region;
a second display region extended from a first side of the first display region, the second display region having an area smaller than that of the first display region;
a third display region extended from a second side of the first display region, the third display region having an area smaller than that of the first display region; and
a non-display region;

a plurality of pixels provided in the first to third display regions;
a power line which is connected to each of the plurality of pixels and applies a first power voltage to the plurality of pixels; and
a fan-out line which is provided in the non-display region and applies a data signal to the plurality of pixels,
wherein the power line includes an additional power line extending in a first direction, a first power line extending in a second direction intersecting the first direction, the first power line being disposed on the additional power line with a first insulating layer interposed therebetween, and a second power line disposed on the first power line with a second insulating layer interposed therebetween.

2. The display device of claim 1 , wherein the additional power line and the first and second power lines are electrically connected to each other.

3. The display device of claim 2 , wherein, in a plan view, the second power line includes a first part overlapping with the additional power line and a second part overlapping with the first power line.

4. The display device of claim 3 , wherein the second power line further includes a third part in which the first part and the second part overlap.

5. The display device of claim 1 , wherein the first display region includes:
a (1-1)th display region; and
a (1-2)th display region which is disposed between the (1-1)th display region and the third display region, and including:
a first region provided with pixels of the plurality of pixels arranged on the same pixel column as pixels of the (1-1)th display region; and
a second region provided with pixels of the plurality of pixels arranged on the same pixel column as the pixels of the plurality of pixels in the (1-1)th display region and the third display region, except the first region.

6. The display device of claim 5 , wherein the first region of the (1-2)th display region is a corner portion having a round shape of which a width decreases as farther from the (1-1)th display region along the second direction.

7. The display device of claim 6 , wherein the fan-out line includes:
a first fan-out line which applies the data signal to the pixels provided in the second display region;
a second fan-out line which applies the data signal to the pixels provided in the first region of the (1-2)th display region; and
a third fan-out line applying the data signal to the pixels provided in the third display region,
wherein the third fan-out line also applies the data signal to pixels of the first display region, which are disposed on the same pixel column as pixels provided in the third display region.

8. The display device of claim 7 , wherein the first fan-out line includes a (1-1)th fan-out line and a (1-2)th fan-out line, which are provided in layers different from each other on the substrate,
wherein the (1-1)th fan-out line and the (1-2)th fan-out line are alternately disposed.

9. The display device of claim 7 , wherein, in a plan view, the first to third fan-out lines are spaced apart from each other on the substrate.

10. The display device of claim 7 , wherein the first to third fan-out lines are disposed in layers different from one another.

11. The display device of claim 10 , wherein the second fan-out line is disposed on the first fan-out line with the first and second insulating layers interposed therebetween.

12. The display device of claim 11 , wherein, in a plan view, the first fan-out line and the second fan-out line overlap with each other.

13. The display device of claim 12 , further comprising:
a first driving voltage line which is provided in the non-display region and applies the first power source to the power line; and
a second driving voltage line which is provided in the non-display region and applies a second power voltage to each of the plurality of pixels.

14. The display device of claim 13 , wherein the first driving voltage line is disposed in the non-display region surrounding one side of the third display region.

15. The display device of claim 13 , wherein the first driving voltage line is disposed in the non-display region to surround one side of the second display region, one side of the third display region, and one side of the (1-2)th display region.

16. The display device of claim 15 , wherein, in the plan view, the first driving voltage line overlaps with the first fan-out line.

17. The display device of claim 13 , wherein the second driving voltage line is provided in a double-layered structure including a first metal layer and a second metal layer disposed on the first metal layer with the second insulating layer interposed therebetween,
wherein, in the plan view, the first metal layer and the second metal layer completely overlap with each other.

18. The display device of claim 13 , further comprising a driving unit which is provided between the second driving voltage line and the first fan-out line in the non-display region in the plan view, and provides a driving signal for driving the plurality of pixels,
wherein the driving unit includes a circuit driver and a signal line unit connected to the circuit driver.

19. The display device of claim 18 , wherein, in the plan view, a first portion of the first fan-out line overlaps with the second fan-out line, a second portion of the first fan-out line overlaps with the second driving voltage line, and a third portion of the first fan-out line overlaps with the signal line unit.

20. The display device of claim 13 , wherein, in the plan view, a first portion of the first fan-out line overlaps with the second fan-out line, and a second portion of the first fan-out line overlaps with the second driving voltage line.

21. The display device of claim 20 , wherein the second driving voltage line is disposed on the first fan-out line with the first insulating layer interposed therebetween, and
the second fan-out line is disposed on the second driving voltage line with the second insulating layer interposed therebetween.

22. The display device of claim 21 , wherein the second driving voltage line is provided in a single-layered structure.

23. The display device of claim 7 , further comprising:
a scan line extending in the first direction and connected to each of the plurality of pixels;
data lines extending in the second direction and connected to each of the plurality pixels; and
a contact line which extends from the non-display region to the first display region and the second region of the (1-2)th display region along the second direction, and is disposed between the first power line and the second power line.

24. The display device of claim 23 , wherein the contact line extending to the second region of the (1-2)th display region is bent in the first direction to be electrically connected to a data line of the data lines which corresponds to a pixel of the pixels provided in the first region, and
the contact line extending to the first display region is bent in the first d

Assignees

• Samsung Display Co Ltd

Inventors

• Song Hee Rim
• Kim Kyung Hoon
• Jung Mee Hye
• Jeong Min Jae
• Choi Seon Young

Classifications

• G09G2320/0223

  Compensation for problems related to R-C delay and attenuation in electrodes of matrix panels, e.g. in gate electrodes or on-substrate video signal electrodes · CPC title

• G09G3/3225 Primary

  using an active matrix · CPC title

• G09G3/3266

  Details of drivers for scan electrodes · CPC title

• G09G2300/0426

  Layout of electrodes and connections · CPC title

• G09G2310/08

  Details of timing specific for flat panels, other than clock recovery · CPC title