Display device

Patent metadata

Field	Value
Publication number	US-10409103-B2
Application number	US-201715697558-A
Country	US
Kind code	B2
Filing date	Sep 7, 2017
Priority date	Sep 8, 2016
Publication date	Sep 10, 2019
Grant date	Sep 10, 2019

Abstract

A display device includes a display region, a peripheral region outside the display region, a control circuit, driving circuits, a clock line connecting the control circuit to one of the driving circuits and in which a first clock signal is supplied, and another clock line connecting the control circuit to the other of the driving circuits and in which a second clock signal is supplied. A light shielding layer includes extension portions each extending along a Y direction, and bent portions between the extension portions. A length of one of the extension portions is longer than a length of the other of the extension portions. In plan view, one of the bent portions overlaps with one of the clock lines, and the other of the bent portions is located between termination portions of the clock lines.

First claim

What is claimed is:

1. A display device comprising:
a display region in which first pixels are arrayed;
a peripheral region overlapping with a light shielding layer and being outside the display region;
a plurality of scanning signal lines and a plurality of video signal lines within the display region;
a first control circuit supplying a control signal including a clock signal;
a first driving circuit and a second driving circuit supplying a scanning signal;
a first clock line connecting the first control circuit to the first driving circuit and in which a first clock signal is supplied;
a second clock line connecting the first control circuit to the second driving circuit and in which a second clock signal is supplied; and
a selection circuit between the display region and the first control circuit,
wherein the plurality of video signal lines extend in a first direction,
wherein the light shielding layer includes a first extension portion and a second extension portion each extending along the first direction and includes a first bent portion and a second bent portion located between the first extension portion and the second extension portion,
wherein the first extension portion is connected to the first bent portion, and the second extension portion is connected to the second bent portion,
wherein a length of the second extension portion is longer than a length of the first extension portion, and
wherein, in plan view, the first bent portion overlaps with the first clock line, and the second bent portion is located between a termination portion of the first clock line and a termination portion of the second clock line,
wherein, in plan view, no second driving circuit is disposed between the selection circuit and the display region.

2. The display device according to claim 1 , further comprising:
second pixels arrayed in the peripheral region,
wherein the first driving circuit includes a first A circuit block and a first B circuit block connected via the first clock line,
wherein the light shielding layer includes a third extension portion between the first bent portion and the second bent portion,
wherein the first A circuit block overlaps with the first extension portion, and the first B circuit block overlaps with the third extension portion,
wherein the plurality of scanning signal lines include a first A scanning signal line connected to the first A circuit block and a first B scanning signal line connected to the first B circuit block, and
wherein the number of the second pixels connected to the first B scanning signal line is larger than the number of the second pixels connected to the first A scanning signal line.

3. The display device according to claim 1 , further comprising:
a selection circuit between the display region and the first control circuit,
wherein the plurality of video signal lines include a first video signal line and a second video signal line, and
wherein, in plan view, a length of the second video signal line from the selection circuit to the display region is longer than a length of the first video signal line from the selection circuit to the display region.

4. The display device according to claim 3 , further comprising:
second pixels arrayed in the peripheral region,
wherein the number of the second pixels connected to the second video signal line is larger than the number of the second pixels connected to the first video signal line.

5. The display device according to claim 1 , further comprising:
second pixels arrayed in the peripheral region,
wherein, when a direction orthogonal to the first direction is referred to as a second direction and one side in the second direction is referred to as a first side while the other side is referred to as a second side,
in the peripheral region, between the selection circuit and the display region, there are a first region on the first side, a second region on the second side, and a third region between the first region and the second region, and
an arrangement density of the second pixels in the third region is higher than each of an arrangement density of the second pixels in the first region and an arrangement density of the second pixels in the second region.

6. The display device according to claim 1 , further comprising:
second pixels arrayed in the peripheral region,
wherein, when a direction orthogonal to the first direction is referred to as a second direction and one side in the second direction is referred to as a first side and the other side is referred to as a second side,
in the peripheral region, between the selection circuit and the display region, there are a first region on the first side, a second region on the second side, and a third region between the first region and the second region, and
the number of the second pixels connected to each of the plurality of video signal lines in the third region is larger than each of the number of the second pixels in the first region and the number of the second pixels in the second region.

7. The display device according to claim 5 ,
wherein a third bent portion positioned opposite to the first bent portion via the first extension portion is provided in the peripheral region,
wherein, in the peripheral region, between the selection circuit and the display region, there is a fourth region overlapping with the third bent portion and located between the first region and the display region, and
wherein an arrangement density of the second pixels in the fourth region is higher than each of the arrangement density of the second pixels in the first region and the arrangement density of the second pixels in the second region.

8. The display device according to claim 1 , further comprising:
a first wiring layer;
a second wiring layer made of a material having resistivity lower than that of the first wiring layer; and
a first potential supply line supplying a potential to the scanning signal lines via the first driving circuit,
wherein the light shielding layer has a third extension portion between the first bent portion and the second bent portion,
wherein the first potential supply line overlaps with the third extension portion, and
wherein, in a region overlapping with the third extension portion, the first potential supply line goes through the first wiring layer and the second wiring layer.

9. The display device according to claim 8 ,
wherein the first driving circuit includes a first B circuit block, a first C circuit block, a first D circuit block, and a first E circuit block,
wherein the first potential supply line goes through the second wiring layer between the first B circuit block and the first C circuit block at a first distance and goes through the second wiring layer between the first D circuit block and the first E circuit block at a second distance, and
wherein the second distance is shorter than the first distance.

10. The display device according to claim 8 , further comprising:
a second potential supply line supplying a potential to the scanning signal lines via the second driving circuit,
wherein the first driving circuit includes a first B circuit block and a first C circuit block,
wherein the first potential supply line goes through the second wiring layer between the first B circuit block and the first C circuit block at a first distance,
wherein the second driving circuit includes a second A circuit block and a second B circuit block,
wherein the second potential supply line goes through the second wiring layer between the second A circuit block and the second B circuit block at a third distance,
wherein the first B circuit block and the second A circuit block are connected to the same scann

Assignees

• Japan Display Inc

Inventors

• Katsuta Tadayoshi

Classifications

• G02F2201/44

  Arrangements combining different electro-active layers, e.g. electrochromic, liquid crystal or electroluminescent layers · CPC title

• G02F1/1345

  Conductors connecting electrodes to cell terminals · CPC title

• G02F2201/56

  Substrates having a particular shape, e.g. non-rectangular · CPC title

• G02F1/136209

  Light shielding layers, e.g. black matrix, incorporated in the active matrix substrate, e.g. structurally associated with the switching element · CPC title

• G02F1/133512 Primary

  Light shielding layers, e.g. black matrix (G02F1/136209 takes precedence) · CPC title