Non-quadrangular display

US2016240141A1 · US · A1

Patent metadata
FieldValue
Publication numberUS-2016240141-A1
Application numberUS-201514960945-A
CountryUS
Kind codeA1
Filing dateDec 7, 2015
Priority dateFeb 12, 2015
Publication dateAug 18, 2016
Grant date

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A display includes a plurality of pixels in a non-quadrangular display area and a plurality of first driving circuits and a plurality of second driving circuits in a peripheral area of the display area. Each of the pixels is connected to a first signal line in a first direction and a second signal line in a second direction crossing the first direction. Each of the first driving circuits outputs a first signal to the first signal line of a corresponding one of the pixels. Each of the second driving circuits outputs a second signal to the second signal line of a corresponding one of the pixels. The number of second driving circuits between neighboring first driving circuits is different depending on a position in the peripheral area.

First claim

Opening claim text (preview).

What is claimed is: 1 . A non-quadrangular display, comprising: a plurality of pixels in a non-quadrangular display area, each of the pixels connected to a first signal line in a first direction and a second signal line in a second direction crossing the first direction; a plurality of first driving circuits in a peripheral area of the display area, each of the first driving circuits to output a first signal to the first signal line of a corresponding one of the pixels; and a plurality of second driving circuits in the peripheral area, each of the second driving circuits to output a second signal to the second signal line of a corresponding one of the pixels, wherein a number of the second driving circuits between neighboring first driving circuits is different depending on a position in the peripheral area. 2 . The display as claimed in claim 1 , wherein the first driving circuits and the second driving circuits are adjacent a circumference of the display area. 3 . The display as claimed in claim 2 , wherein angles for arranging the first driving circuits and the second driving circuits are changed according to positions of the first driving circuits and the second driving circuits. 4 . The display as claimed in claim 3 , wherein the angles are changed equally to normal directions of the circumference of the display area which is corresponding to the positions of each of the first driving circuits and the second driving circuits. 5 . The display as claimed in claim 4 , wherein an area of the first driving circuit for at least one pixel is different from an area of the second driving circuit for at least one pixel. 6 . The display as claimed in claim 5 , wherein a sum of widths of display areas of the first driving circuits and the second driving circuits alternately disposed and adjacently provided in a tangential direction is less than half the width of the pixel. 7 . The display as claimed in claim 1 , wherein: the display area includes a curved area, and the pixels are arranged in a matrix form in the curved area. 8 . The display as claimed in claim 7 , wherein: when a step is between neighboring arrangements of the pixels, the first driving circuit or the second driving circuit in the peripheral area corresponds to the step according to a type of the step. 9 . The display as claimed in claim 1 , wherein: the pixels include a plurality of subpixels, the subpixels emit different colors of light, and the subpixels are to be controlled by second signals transmitted through the second signal lines in synchronization with first signals transmitted through the first signal lines. 10 . The display as claimed in claim 9 , wherein the subpixels include: a plurality of switching transistors, each of the switching transistors including a first electrode connected to a respective one of the second signal lines and the first signal lines as gate electrodes; and a plurality of driving transistors, each of the driving transistors including a gate electrode connected to a second electrode of a respective one of the switching transistors, a first electrode to receive a power voltage, and a second electrode connected to an organic light emitting diode. 11 . The display as claimed in claim 10 , wherein each of the subpixels receives an initialization voltage in synchronization with first signals transmitted through respective first signal lines corresponding to a previous pixel row. 12 . The display as claimed in claim 11 , wherein each of the subpixels includes a compensation transistor connected between the gate electrode and the second electrodes of the driving transistors, the gate electrode included as part of a corresponding first signal line. 13 . The display as claimed in claim 1 , wherein the first signal lines and the second signal lines of the pixels do not cross each other in the peripheral area. 14 . The display as claimed in claim 1 , wherein: each the pixels is connected to a third signal line in the first direction, and the display includes a plurality of third driving circuits alternately disposed with at least one of the second driving circuits, each of the third driving circuits to output a third signal to a third signal line of at least one of the pixels in a region facing the first driving circuits in the peripheral area. 15 . A non-quadrangular display, comprising: a display area including a curved portion, the display area including a plurality of pixels disposed so that steps in a row direction and a column direction correspond to the curved portion; and a non-display area including first driving circuits to supply a first signal to respective pixels in the row direction and second driving circuits to supply a second signal to respective pixels in the column direction, different numbers of the first and second driving circuits disposed on a circumference of the display area. 16 . The display as claimed in claim 15 , wherein at least one of the first driving circuits is provided in substantially a normal direction in which the pixels have steps in the row direction. 17 . The display as claimed in claim 15 , wherein at least one of the second driving circuits is provided in substantially a normal direction in which the pixels have steps in the column direction. 18 . The display as claimed in claim 15 , wherein the non-display area has a predetermined width along a circumference of the display area. 19 . The display as claimed in claim 18 , wherein each of the first driving circuit and the second driving circuit has substantially rectangular shape and substantially a same length of a long side. 20 . The display as claimed in claim 19 , wherein a width of the non-display area is greater than the length of the long side and less than a sum of both long side lengths of the substantially rectangular shape.

Assignees

Inventors

Classifications

  • Integration of the drivers onto the display substrate · CPC title

  • Details of driving circuits · CPC title

  • Drivers integrated on the active matrix substrate (G02F1/136277 takes precedence) · CPC title

  • Arrangement of scan or data electrode driver circuits at the periphery of a panel not inherent to a split matrix structure · CPC title

  • Substrates having a particular shape, e.g. non-rectangular · CPC title

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What does patent US2016240141A1 cover?
A display includes a plurality of pixels in a non-quadrangular display area and a plurality of first driving circuits and a plurality of second driving circuits in a peripheral area of the display area. Each of the pixels is connected to a first signal line in a first direction and a second signal line in a second direction crossing the first direction. Each of the first driving circuits output…
Who is the assignee on this patent?
Samsung Display Co Ltd
What technology area does this patent fall under?
Primary CPC classification G02F1/13454. Mapped technology areas include Physics.
When was this patent published?
Publication date Thu Aug 18 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (A1). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 2 related publications on this page (citations in our corpus or others sharing the same primary CPC).