Flexible display panel

US10403645B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10403645-B2
Application numberUS-201715681110-A
CountryUS
Kind codeB2
Filing dateAug 18, 2017
Priority dateSep 3, 2014
Publication dateSep 3, 2019
Grant dateSep 3, 2019

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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Abstract

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A flexible display panel includes a bending area and a surrounding area adjacent to the bending area. The barrier layer includes first silicon nitride layers and first silicon oxide layers which are overlapped with the bending area. The first silicon nitride layers and the first silicon oxide layers are stacked alternately. Each of the first silicon nitride layers may have a thickness less than or equal to about 400 Å, and each of the first silicon oxide layers may have a thickness less than or equal to about 650 Å.

First claim

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What is claimed is: 1. A flexible display panel including a bending area and a peripheral area adjacent to the bending area, the flexible display panel comprising: a base member; a barrier layer on the base member; and a pixel on the barrier layer and including a thin film transistor and a display element connected to the thin film transistor, wherein the barrier layer includes at least one first silicon nitride layer overlapped with the bending area, at least one first silicon oxide layer overlapped with the bending area, at least one second silicon nitride layer overlapped with the peripheral area, and at least one second silicon oxide layer overlapped with the second silicon nitride layer, and wherein the second silicon nitride layer has a thickness greater than the thickness of the first silicon nitride layer, and the second silicon oxide layer has a thickness greater than the thickness of the first silicon oxide layer. 2. The flexible display panel of claim 1 , wherein the peripheral area and the bending area of the barrier layer have substantially an equal thickness. 3. The flexible display panel of claim 1 , further comprising a buffer layer on the barrier layer and contacting the thin film transistor. 4. The flexible display panel of claim 3 , wherein the buffer layer includes at least one third silicon nitride layer overlapped with the bending area, at least one third silicon oxide layer overlapped with the bending area, at least one fourth silicon nitride layer overlapped with the peripheral area, and at least one fourth silicon oxide layer overlapped with the fourth silicon nitride layer, and wherein the fourth silicon nitride layer has a thickness greater than the thickness of the third silicon nitride layer, and wherein the fourth silicon oxide layer has a thickness greater than the thickness of the third silicon oxide layer. 5. The flexible display panel of claim 4 , wherein the peripheral area and the bending area of the buffer layer have substantially an equal thickness. 6. The flexible display panel of claim 5 , wherein a total thickness of the first silicon nitride layers is less than a total thickness of the first silicon oxide layers, and wherein a total thickness of the third silicon nitride layers is greater than a total thickness of the third silicon oxide layers. 7. The flexible display panel of claim 3 , wherein at least one of the barrier layer and the buffer layer includes a hardness strengthening layer overlapped with the bending area. 8. The flexible display panel of claim 1 , further comprising a boundary area which is defined between the bending area and the peripheral area, wherein the first silicon nitride layers and the first silicon oxide layers are spaced from the second silicon nitride layer and the second silicon oxide layer, respectively, with the boundary area located therebetween. 9. The flexible display panel of claim 7 , further comprising an insulation layer disposed on the barrier layer, wherein the boundary area comprises the same material as the insulating layer. 10. The flexible display panel of claim 7 , wherein the flexible display panel is bent around a bending axis extending along a first direction, and the boundary area extends along the first direction. 11. The flexible display panel of claim 1 , wherein the first silicon nitride layer has a thickness less than or equal to about 400 Å, and wherein the first silicon oxide layer has a thickness less than or equal to about 650 Å. 12. A flexible display panel comprising: a base member; a barrier layer on the base member, wherein the barrier layer includes a first hardness strengthening layer; and a pixel on the barrier layer and including a thin film transistor and a display element connected to the thin film transistor, wherein the barrier layer includes at least one first silicon nitride layer and at least one first silicon oxide layer, and the first hardness strengthening layer is located between a first silicon nitride layer of the at least one first silicon nitride layer and an adjacent first silicon oxide layer of the at least one first silicon oxide layer and comprises a material different from the first silicon nitride layer and the adjacent first silicon oxide layer, and wherein the first hardness strengthening layer comprises at least one of graphene, graphene oxide, or carbon nanotube. 13. The flexible display panel of claim 12 , wherein each of the at least one first silicon nitride layer has an equal thickness, and wherein each of the at least one first silicon oxide layer has an equal thickness. 14. The flexible display panel of claim 12 , further comprising a buffer layer on the barrier layer and contacting the thin film transistor, wherein the buffer layer includes a second hardness strengthening layer.

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What does patent US10403645B2 cover?
A flexible display panel includes a bending area and a surrounding area adjacent to the bending area. The barrier layer includes first silicon nitride layers and first silicon oxide layers which are overlapped with the bending area. The first silicon nitride layers and the first silicon oxide layers are stacked alternately. Each of the first silicon nitride layers may have a thickness less than…
Who is the assignee on this patent?
Samsung Display Co Ltd, Korea Advanced Inst Sci & Tech
What technology area does this patent fall under?
Primary CPC classification H01L27/1218. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Sep 03 2019 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 1 related publication on this page (citations in our corpus or others sharing the same primary CPC).