Quantizing circuits having improved sensing

Patent metadata

Field	Value
Publication number	US-10403339-B2
Application number	US-201816184798-A
Country	US
Kind code	B2
Filing date	Nov 8, 2018
Priority date	Jun 15, 2007
Publication date	Sep 3, 2019
Grant date	Sep 3, 2019

Abstract

A system including a processor and a memory device. The memory device includes a memory array having a plurality of memory elements connected to a bit-line and a quantizing circuit. The quantizing circuit includes a combination circuit configured to combine an analog input signal with an analog feedback signal to produce a delta signal. The quantizing circuit also includes an integrator configured to receive and integrate the delta signal to produce a sigma signal. The quantizing circuit also includes an analog-to-digital converter configured to receive the sigma signal and compare the sigma signal with a reference signal to produce a digital output signal.

First claim

What is claimed is:

1. A device, comprising:
an imaging element configured to output a first signal in response to light impinging upon the imaging element; and
a quantizing circuit, wherein the quantizing circuit comprises:
a combination circuit configured to combine the first signal with an analog feedback signal to produce a delta signal;
an integrator configured to receive and integrate the delta signal to produce a sigma signal; and
an analog-to-digital converter configured to receive the sigma signal and compare the sigma signal with a reference signal to produce a digital output signal.

2. The device of claim 1 , comprising a filter coupled to the quantizing circuit, wherein the filter is configured to receive the digital output and generate a value associated with the first signal based on the digital output.

3. The device of claim 1 , wherein the quantizing circuit comprises a digital-to-analog converter configured to convert the digital output signal to the analog feedback signal.

4. The device of claim 3 , wherein the digital-to-analog converter comprises a current source and a switch.

5. The device of claim 1 , wherein the integrator comprises a capacitor.

6. The device of claim 1 , wherein the analog-to-digital converter comprises a comparator.

7. The device of claim 1 , wherein the combination circuit comprises a first voltage to current converter configured to convert the analog input signal to an analog input current.

8. The device of claim 7 , wherein the combination circuit comprises a second voltage to current converter configured to convert the analog feedback signal to an analog feedback current.

9. The device of claim 7 , wherein the first voltage to current converter comprises a transistor in series with a resistor.

10. A device, comprising:
a resistive memory array comprising a plurality of storage locations; and
a quantizing circuit, wherein the quantizing circuit comprises:
a combination circuit configured to combine an analog input signal related to a value stored in a data storage location of the plurality of storage locations, with an analog feedback signal to produce a delta signal;
an integrator configured to receive and integrate the delta signal to produce a sigma signal;
an analog-to-digital converter configured to receive the sigma signal and compare the sigma signal with a reference signal to produce a digital output signal; and
a digital-to-analog converter configured to convert the digital output signal to the analog feedback signal.

11. The device of claim 10 , wherein the resistive memory array comprises a phase change memory array or a magnetoresistive memory array.

12. The device of claim 10 , comprising control circuitry configured to receive command signals from a processor and to assert a clock signal within the memory device.

13. The device of claim 12 , comprising a filter coupled to the quantizing circuit, wherein the filter is configured to receive the digital output and generate a value associated with the analog input signal based on the digital output.

14. The device of claim 13 , wherein the filter is configured to receive the clock signal and generate a value associated with the analog input signal utilizing the clock signal.

15. The device of claim 10 , wherein the digital-to-analog converter comprises a switch configured to selectively route a reference current to ground or to conductor coupled to the data storage location based on the digital output signal to generate the analog feedback signal.

16. The device of claim 10 , wherein the digital-to-analog converter comprises a switch coupled to a capacitor, wherein the switch is configured to selectively supplement a reference current with current from the capacitor based on the digital output signal to generate the analog feedback signal.

17. A method of sensing a memory element in a system, the method comprising:
providing, from a processor, a read command signal to a phase change memory device or a magnetoresistive memory device;
determining, in a quantizing circuit of the memory device, a difference between a reference voltage and a voltage of an electrical conductor connected to a resistive memory element of the phase change memory device or the magnetoresistive memory device, wherein determining the difference comprises converting a voltage signal into a current signal;
integrating, with an integrator of the quantizing circuit, the difference over time to determine a sum; and
controlling the voltage of the electrical conductor by selectively conducting a reference current through the electrical conductor based on the sum.

18. The method of claim 17 , wherein determining the difference comprises generating the reference voltage by mirroring a current onto the electrical conductor.

19. The method of claim 17 , wherein controlling comprises processing the reference current with a low-pass filter.

20. The method of claim 17 , wherein determining a difference between a reference voltage and a voltage of an electrical conductor comprises determining a difference between the reference voltage and a bit-line voltage.

Assignees

• Ovonyx Memory Tech Llc
• Micron Technology Inc

Inventors

• Baker Russel J

Classifications

• G11C5/147

  Voltage reference generators, voltage or current regulators; Internally lowered supply levels; Compensation for voltage drops (G11C5/141 takes precedence) · CPC title

• G11C2211/5644

  Multilevel memory comprising counting devices · CPC title

• G11C11/5642 Primary

  Sensing or reading circuits; Data output circuits · CPC title

• G11C2211/5634

  Reference cells · CPC title

• H03M3/43

  the quantiser being a single bit one · CPC title