Local interconnect structure including non-eroded contact via trenches

US10388602B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10388602-B2
Application numberUS-201615251804-A
CountryUS
Kind codeB2
Filing dateAug 30, 2016
Priority dateDec 10, 2015
Publication dateAug 20, 2019
Grant dateAug 20, 2019

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A local interconnect structure includes a substrate having a dielectric layer and at least one semiconductor contact structure embedded in the dielectric layer. An electrically conductive material is deposited in a non-eroded contact trench that defines at least one electrically conducive contact via. The contact via extends from a first end that is flush with an upper surface of the dielectric layer to a second end that contacts the at one semiconductor contact structure. A local conductive material layer is formed in the dielectric layer and contacts the first end of the contact via. The non-eroded contact trench includes sharp upper corners formed at approximately ninety degrees with respect to the first end of the contact via.

First claim

Opening claim text (preview).

What is claimed is: 1. A local interconnect structure, comprising: a substrate extending along a longitudinal direction to define a length and a vertical direction perpendicular to the longitudinal direction to define a height, the substrate including a first dielectric layer and at least one semiconductor contact structure embedded in the first dielectric layer, the at least one semiconductor contact structure extending along the longitudinal direction to define a contact thickness and along the vertical direction to define a contact height; a second dielectric layer deposited on an upper surface of the first dielectric layer an electrically conductive material deposited in a non-eroded contact trench that defines first and second electrically conductive contact vias, the first and second contact vias comprising a first metal and extending from a first end that is flush with an upper surface of the second dielectric layer to a second end that contacts the at one semiconductor contact structure; a local conductive layer in the second dielectric layer that extends across both the first and second contact vias, and that contacts the first end of each of the first and second contact vias, the local conductive layer comprising a second metal different from the first metal, wherein a depth of the local conductive layer ranges from approximately 20 nanometers to approximately 100 nanometers; and a gate contact structure embedded in the first dielectric layer, the gate contact structure extending along the longitudinal direction to define a gate thickness and along the vertical direction to define a gate height, wherein the contact height of the at least one semiconductor contact structure matches the gate height of the gate contact structure, the gate contact structure includes a first non-conductive spacer formed on a first sidewall of a gate contact and a second non-conductive spacer formed on a second sidewall of the gate contact and; wherein the non-eroded contact trench includes sharp upper corners formed at approximately ninety degrees with respect to the first end of the first and second contact vias, and wherein the electrically conductive material extends along the longitudinal direction within the non-eroded contact trench to define a via thickness that is greater than the structure thickness of the at least one semiconductor contact structure, and wherein the electrically conductive material is directly on an upper surface of the at least one semiconductor contact structure to define a tapered portion between at least one electrically conductive via and the at least one semiconductor contact structure, wherein a first side wall of the at least one semiconductor contact structure directly contact at least one of the first and second spacers of the gate contact structure. 2. The local interconnect structure of claim 1 , further comprising a second dielectric layer deposited on an upper surface of the first dielectric layer. 3. The local interconnect structure of claim 1 , wherein the first metal is tungsten (W) and the second metal is copper (Cu). 4. The local interconnect structure of claim 1 , wherein the at least one contact via and the local conductive layer both comprise the same metal. 5. The local interconnect structure of claim 1 , wherein the local conductive layer extends along the longitudinal direction to define a contact length that is greater than the via thickness of the at least one contact via. 6. The local interconnect structure of claim 5 , wherein the contact length of the local conductive layer is greater than the via thickness and the structure thickness. 7. The local interconnect structure of claim 6 , wherein the at least one contact via includes first and second contact vias, and the local conductive layer is on an upper surface of the first and second adjacent contact vias. 8. The local interconnect structure of claim 7 , wherein the first and second adjacent contact vias are separated by one another by the gate contact structure. 9. The local interconnect structure of claim 8 , wherein the first spacer is interposed between the first adjacent contact via and the first sidewall of the gate contact structure and the second spacer is interposed between the second adjacent contact via and the second sidewall of the gate contact structure. 10. The local interconnect structure of claim 9 , wherein a portion of the second dielectric layer is on an upper surface of the gate contact so as to electrically isolate the gate contact from the local conductive layer. 11. The local interconnect structure of claim 10 , wherein the gate contact comprises a metal material. 12. The local interconnect structure of claim 10 , wherein the gate contact comprises a silicide material. 13. The local interconnect structure of claim 11 , wherein the first and second dielectric layers comprise silicon dioxide (SiO 2 ), and the first and second spacers comprise silicon nitride (SiN).

Assignees

Inventors

Classifications

  • the principal metal being a refractory metal · CPC title

  • the principal metal being copper · CPC title

  • Local interconnections · CPC title

  • H10W20/089Primary

    using processes for implementing desired shapes or dispositions of the openings, e.g. double patterning · CPC title

  • involving intermediate temporary filling with material · CPC title

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Frequently asked questions

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What does patent US10388602B2 cover?
A local interconnect structure includes a substrate having a dielectric layer and at least one semiconductor contact structure embedded in the dielectric layer. An electrically conductive material is deposited in a non-eroded contact trench that defines at least one electrically conducive contact via. The contact via extends from a first end that is flush with an upper surface of the dielectric…
Who is the assignee on this patent?
IBM, Globalfoundries Inc
What technology area does this patent fall under?
Primary CPC classification H10W20/089. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Aug 20 2019 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 3 related publications on this page (citations in our corpus or others sharing the same primary CPC).