Non zero-voltage switching (ZVS) detection in resonant converters

US10374516B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10374516-B2
Application numberUS-201715668974-A
CountryUS
Kind codeB2
Filing dateAug 4, 2017
Priority dateAug 19, 2016
Publication dateAug 6, 2019
Grant dateAug 6, 2019

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

According to an implementation, a resonant converter for detecting non-zero voltage switching includes an oscillator configured to generate a first clock signal to drive a first power switch, and a second clock signal to drive a second power switch. The resonant converter includes a non-zero voltage switching (non-ZVS) detection circuit configured to receive an integrated current sense signal sensed on a primary side of a transformer of a resonant network, and determine a polarity of a voltage of the integrated current sense signal at a predetermined point in the first clock signal or the second clock signal during a switching cycle. The non-ZVS detection circuit is configured to detect a non-ZVS event based on the polarity of the voltage of the integrated current sense signal at the predetermined point in the first clock signal or the second clock signal during the switching cycle.

First claim

Opening claim text (preview).

What is claimed is: 1. A resonant converter for detecting non-zero voltage switching, the resonant converter comprising: an oscillator configured to generate a first clock signal to drive a first power switch, and a second clock signal to drive a second power switch, each of the first clock signal and the second clock signal being activated during a switching cycle; and a non-zero voltage switching (non-ZVS) detection circuit configured to receive an integrated current sense signal sensed on a primary side of a transformer of a resonant network, the non-ZVS detection circuit including a clock sensor configured to receive the first clock signal and sense a predetermined time point in the first clock signal, the predetermined time point being later than an activation time of the first clock signal and being before a deactivation time of the first clock signal, the non-ZVS detection circuit configured to determine a polarity of a voltage of the integrated current sense signal using the sensed predetermined time point, the non-ZVS detection circuit configured to detect a non-ZVS event based on the polarity of the voltage of the integrated current sense signal being negative or positive. 2. The resonant converter of claim 1 , wherein the predetermined time point in the first clock signal is a halfway time point in the first clock signal. 3. The resonant converter of claim 1 , wherein the non-ZVS detection circuit is configured to detect the non-ZVS event in response to the voltage of the integrated current sense signal being negative at the predetermined time point. 4. The resonant converter of claim 1 , wherein the non-ZVS detection circuit is configured to detect the non-ZVS event in response to the voltage of the integrated current sense signal being positive at the predetermined time point. 5. The resonant converter of claim 1 , wherein the clock sensor is configured to receive the first clock signal and sense a half-way time point in the first clock signal during the switching cycle, the resonant converter further comprising: a half-way point clock calculator configured to calculate a half-way time point in the second clock signal during the switching cycle based on the sensed half-way time point of the first clock signal, wherein the non-ZVS detection circuit is configured to determine the polarity of the voltage of the integrated current sense signal at the half-way time point in the second clock signal during the switching cycle using the integrated current sense signal and the calculated half-way time point of the second clock signal, wherein, in response to the polarity being negative, the non-ZVS detection circuit is configured to determine the non-ZVS event during the switching cycle. 6. The resonant converter of claim 1 , wherein, in response to the detection of the non-ZVS event, the non-ZVS detection circuit is configured to trigger a protection circuit to increase a frequency or stop a switching operation of the oscillator. 7. The resonant converter of claim 1 , wherein the switching cycle is a first switching cycle, and the non-ZVS detection circuit is configured to detect the non-ZVS event in a second switching cycle in response to the voltage of the integrated current sense signal during the second switching cycle being positive at the predetermined time point in the first clock signal. 8. The resonant converter of claim 7 , wherein the sensor is configured to receive the first clock signal during the first switching cycle, and sense a half-way time point in the first clock signal during the first switching cycle, wherein the non-ZVS detection circuit is configured to determine the polarity of the voltage of the integrated current sense signal at the half-way time point in the first clock signal during the second switching cycle using the integrated current sense signal and the half-way time point of the first clock signal during the first switching cycle, wherein the non-ZVS detection circuit is configured to determine the non-ZVS event during the second switching cycle based on the polarity being positive. 9. The resonant converter of claim 1 , further comprising: an integrated current sense circuit coupled to the resonant network on the primary side of the transformer, the integrated current sense circuit configured to generate the integrated current sense signal. 10. The resonant converter of claim 9 , wherein the resonant network includes a resonant capacitor, a resonant inductor, and a magnetizing inductor, and the integrated current sense circuit includes a capacitor divider coupled to the resonant capacitor. 11. A resonant converter for detecting non-zero voltage switching, the resonant converter comprising: an oscillator configured to generate a first clock signal to drive a first power switch, and a second clock signal to drive a second power switch, each of the first clock signal and the second clock signal being activated during a switching cycle; and a non-zero voltage switching (non-ZVS) detection circuit configured to receive an integrated current sense signal sensed on a primary side of a transformer of a resonant network, the non-ZVS detection circuit including a clock sensor configured to generate a sensor signal at a predetermined time point in the first clock signal, and a clock calculator configured to determine a predetermined time point in the second clock signal based on the sensor signal and the second clock signal, the non-ZVS detection circuit configured to determine a polarity of a voltage of the integrated current sense signal using the predetermined time point in the second clock signal, the predetermined time point being later than an activation time of the second clock signal and being before a deactivation time of the second clock signal, the non-ZVS detection circuit configured to detect a non-ZVS event in response to the polarity of the voltage of the integrated current sense signal being negative or positive at the predetermined time point in the second clock signal. 12. The resonant converter of claim 11 , wherein the predetermined time point in the second clock signal is a halfway time point in the second clock signal during the switching cycle. 13. The resonant converter of claim 11 , wherein the non-ZVS detection circuit is configured to detect a ZVS event in response to the polarity of the voltage of the integrated current sense signal being positive at the predetermined time point in the second clock signal. 14. The resonant converter of claim 11 , wherein, in response to the detection of the non-ZVS event, the non-ZVS detection circuit is configured to trigger a protection circuit to increase a frequency or stop a switching operation of the oscillator. 15. The resonant converter of claim 11 , wherein the resonant network includes a resonant capacitor, a resonant inductor, and a magnetizing inductor. 16. A resonant converter for detecting non-zero voltage switching, the resonant converter comprising: an oscillator configured to generate a first clock signal to drive a first power switch, and a second clock signal to drive a second power switch, each of the first clock signal and the second clock signal being activated during a first switching cycle and a second switching cycle, the second switching cycle being after the first switching cycle; and a non-zero voltage switching (non-ZVS) detection circuit configured to receive an integrated current sense signal sensed on a primary side of a transformer of a resonant network, the non-ZVS detection circuit including a clock sensor configured to sense a predetermined time point in the fi

Assignees

Inventors

Classifications

  • with automatic control of output voltage or current (H02M3/33561 takes precedence) · CPC title

  • H02M3/3381Primary

    using a single commutation path · CPC title

  • with galvanic isolation between input and output of both the power stage and the feedback loop · CPC title

  • Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere ({measuring superconductive properties G01R33/1238;} testing line transmission systems H04B3/46; testing or measuring semiconductors or solid state devices during manufacture {H10P74/00}) · CPC title

  • Indicating direction of current; Indicating polarity of voltage · CPC title

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What does patent US10374516B2 cover?
According to an implementation, a resonant converter for detecting non-zero voltage switching includes an oscillator configured to generate a first clock signal to drive a first power switch, and a second clock signal to drive a second power switch. The resonant converter includes a non-zero voltage switching (non-ZVS) detection circuit configured to receive an integrated current sense signal s…
Who is the assignee on this patent?
Fairchild Korea Semiconductor Ltd, Semiconductor Components Ind Llc
What technology area does this patent fall under?
Primary CPC classification H02M3/3381. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Aug 06 2019 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 4 related publications on this page (citations in our corpus or others sharing the same primary CPC).