Switch control circuit and resonant converter including the same

Patent metadata

Field	Value
Publication number	US-9647528-B2
Application number	US-201514619403-A
Country	US
Kind code	B2
Filing date	Feb 11, 2015
Priority date	Feb 11, 2014
Publication date	May 9, 2017
Grant date	May 9, 2017

Abstract

A resonant converter includes a first switch coupled between a first node and a primary side ground, a second switch coupled between an input voltage and the first node, at least one capacitor and at least one inductor coupled in series between both ends of the first switch, and a switch control circuit that shifts switching frequencies of the first and second switches during a period for which an abnormal event lasts when occurrence of the abnormal event is detected, and shifts the switching frequencies in an opposite direction when the abnormal event ends.

First claim

What is claimed is:

1. A resonant converter comprising:
a first switch;
a second switch coupled to the first switch;
a capacitor and an inductor electrically coupled to a node to which the first switch and the second switch are coupled; and
a switch control circuit configured to shift switching frequencies of the first and second switches during a period for which an abnormal event lasts when an occurrence of the abnormal event is detected, shift the switching frequency in an opposite direction when the abnormal event ends, control a switching operation of the first and second switches according to first and second clock signals, respectively, and increase frequencies of the first and second clock signals during the period for which the abnormal event lasts.

2. The resonant converter according to claim 1 ,
wherein the switch control circuit is configured to increase the frequencies of the first and second clock signals in a first period of at least one cycle of the first clock signal or the second clock signal.

3. The resonant converter according to claim 1 ,
wherein the switch control circuit is configured to decrease the frequencies of the first and second clock signals from a time point at which the abnormal event ends.

4. The resonant converter according to claim 1 ,
wherein the switch control circuit is configured to generate a comparison voltage corresponding to an output voltage of the resonant converter, generate an internal comparison voltage by decreasing the comparison voltage by a predetermined period unit during the period for which the abnormal event lasts and shift the switching frequencies of first and second switches using the internal comparison voltage.

5. The resonant converter according to claim 1 ,
wherein the switch control circuit is configured to shift the switching frequencies of the first and second switches during the period for which the abnormal event lasts in a predetermined monitoring period.

6. The resonant converter according to claim 2 ,
wherein the abnormal event includes at least one of non-zero voltage switching or current limiting conditions, and
the switch control circuit is configured to perform control so that units by which the frequency is increased for the first and second clock signals are different in each first period according to each of the at least one of non-zero voltage switching or the current limiting conditions.

7. The resonant converter according to claim 3 ,
wherein the switch control circuit is configured to decrease the frequencies of the first and second clock signals in a second period of at least one cycle of any one of the first clock signal and the second clock signal.

8. The resonant converter according to claim 4 ,
wherein the switch control circuit is configured to increase the internal comparison voltage by the predetermined period unit from a time point at which the abnormal event ends until the internal comparison voltage arrives at the comparison voltage.

9. The resonant converter according to claim 4 ,
wherein the switch control circuit is configured to generate first and second clock signals using a half cycle signal according to a result of comparing a saw wave based on a current detection voltage corresponding to a current supplied to a load with the internal comparison voltage, and control a switching operation of the first and second switches according to the first and second clock signals.

10. The resonant converter according to claim 7 ,
wherein the abnormal event includes at least one of non-zero voltage switching or current limiting conditions, and
the switch control circuit is configured to perform control so that units by which the frequency is decreased for the first and second clock signals are different in each second period according to the at least one of the non-zero voltage switching or the current limiting conditions.

11. The resonant converter according to claim 9 ,
wherein the switch control circuit is configured to increase the internal comparison voltage by a predetermined period unit from a time point at which the abnormal event ends until the internal comparison voltage arrives at the comparison voltage.

12. A switch control circuit of a resonant converter to supply power according to a switching operation of first and second switches, the switch control circuit comprising:
a frequency shift controller configured to generate a frequency shift signal for increasing frequencies of first and second clock signals during a period for which an abnormal event lasts, and generate a frequency shift signal for decreasing frequencies of first and second clock signals when the abnormal event ends; and
an LLC controller configured to increase the frequencies of the first and second clock signals according to the frequency shift signal during the period for which the abnormal event lasts, decrease the frequencies of the first and second clock signals according to the frequency shift signal after the abnormal event ends, and control the switching operation of the first and second switches according to the first and second clock signals.

13. The switch control circuit according to claim 12 ,
wherein the frequency shift controller is configured to generate a frequency shift signal for increasing the frequencies of the first and second clock signals by a shift unit according to a type of abnormal event in every predetermined period during the period for which the abnormal event lasts.

14. The switch control circuit according to claim 12 ,
wherein the LLC controller is configured to set a current cycle of the first and second clock signals by subtracting a first period according to the frequency shift signal from a result of counting the first or second clock signals in an immediately previous cycle during the period for which the abnormal event lasts.

15. The switch control circuit according to claim 12 ,
wherein the LLC controller is configured to set a current cycle of the first and second clock signals by adding a second period according to the frequency shift signal to a result of counting any one of the first and second clock signals in an immediately previous cycle from a time point at which the abnormal event ends.

16. The switch control circuit according to claim 13 ,
wherein the predetermined period includes at least one cycle in the first or second clock signals.

17. The switch control circuit according to claim 14 ,
wherein the LLC controller is configured to count an enable period of any one of the first and second clock signals in the immediately previous cycle using a count clock signal, and calculate one cycle of the first and second clock signals based on the counted period.

18. A switch control circuit of a resonant converter to supply power according to a switching operation of first and second switches, the switch control circuit comprising:
a half cycle signal generator configured to generate a comparison voltage corresponding to an output voltage of the resonant converter, and generate a half cycle signal based on a result of comparing the comparison voltage with a saw wave based on a current detection voltage corresponding to a current supplied to a load;
a frequency shift controller configured to decrease the comparison voltage in every first predetermined period during a period for which an abnormal event lasts to generate an internal comparison voltage, and increase the internal comparison voltage in every second predetermined period until the internal comparison voltage arrives at the comparison voltage when the abnor

Assignees

• Fairchild Korea Semiconductor Ltd
• Fairchild Korea Semiconductor Ltd

Inventors

• Lee Won-Tae
• Baek Hyeong Seok
• Jang Ji-Hoon
• Choi Hang-Seok

Classifications

• Y02B70/1433

  Cross-Sectional Technologies · mapped topic

• Y02B70/1491

  Cross-Sectional Technologies · mapped topic

• Y02B70/1475

  Cross-Sectional Technologies · mapped topic

• H02M2001/0058

  Electricity · mapped topic

• H02M3/33569

  having several active switching elements (H02M3/3353 takes precedence) · CPC title