Methods and operations using XNOR functions with flash devices and solid state drives

Patent metadata

Field	Value
Publication number	US-10373696-B2
Application number	US-201816104696-A
Country	US
Kind code	B2
Filing date	Aug 17, 2018
Priority date	Aug 18, 2017
Publication date	Aug 6, 2019
Grant date	Aug 6, 2019

Abstract

A method for writing data to a NAND flash memory is disclosed, having steps of writing a first set of data to a first memory block, writing a second set of data to a second memory block, writing a third set of data to a third memory block and writing a fourth set of data to a XNOR memory block.

First claim

What is claimed is:

1. A method for writing data to a NAND flash memory, comprising:
writing a first set of data to a first memory block;
writing a second set of data to a second memory block;
writing a third set of data to a third memory block;
writing a fourth set of data to a XNOR memory block;
checking the first memory block, the second memory block and the third memory block with the XNOR memory block;
correcting at least one of the first memory block, the second memory block and the third memory block when the checking indicates an error in the first memory block, the second memory block and the third memory block;
writing a fifth set of data to the first memory block;
writing a sixth set of data to the second memory block;
writing a seventh set of data to the third memory block; and
writing a eighth set of data to the XNOR memory block.

2. The method according to claim 1 , further comprising:
checking the first memory block, the second memory block and the third memory block with the XNOR memory block; and
correcting at least one of the first memory block, the second memory block and the third memory block when the checking indicates an error in the first memory block, the second memory block and the third memory block.

3. The method according to claim 2 , further comprising:
erasing the XNOR memory block after the correcting the at least one of the first memory block, the second memory block and the third memory block when the checking indicates an error in the first memory block, the second memory block and the third memory block.

4. The method according to claim 1 , further comprising:
compressing the data in the first set of data, the second set of data and the third set of data by an off chip compression method prior to the writing of the data.

5. The method according to claim 2 , further comprising:
exporting data from the XNOR block to a QLC memory.

6. The method according to claim 5 , further comprising:
erasing the data in the XNOR block.

7. A device, comprising:
a NAND flash memory; and
means for creating a first memory block configured to accept a first set of data for the NAND flash memory;
means for creating a second memory block configured to accept a second set of data for the NAND flash memory;
means for creating a third memory block configured to accept a third set of data for the NAND flash memory;
means for creating a XNOR memory block configured to accept a fourth set of data for the NAND flash memory; and
means for comparing the fourth set of data to the first set of data, the second set of data and the third set of data.

8. A method for storing data on a flash device, comprising:
creating at least two blocks of data on the flash drive;
creating at least one block related to XNOR operations on the flash drive;
receiving a command for writing at least two sets of data to the at least two blocks of data;
writing at least a first set of data to at least one created block;
writing at least a second set of data to a second of the created block;
writing at least a third set of data to the at least one block for XNOR operations, wherein the third set of data contains the first set of data and the second set of data; and
checking for errors in writing of the data in the one created block and the second of the created blocks by comparing the data in one block for XNOR operations and the first set of data in the created block and the second set of data in the second created block.

9. The method according to claim 8 , further comprising:
erasing the at least one block for XNOR operations after the checking for errors.

10. The method according to claim 8 , further comprising:
copying data from the at least one block for XNOR operations to another memory.

11. The method according to claim 8 , wherein the checking for errors is provided by an enhanced post write read operation.

12. The method according to claim 8 , further comprising:
compressing data with an off chip compression method prior to the writing of data.

13. The method according to claim 8 , wherein each block is composed of at least three memory blocks.

14. The method according to claim 8 , wherein each of the blocks is one of a single level cell, multi-level cell, triple level cell or quad level cell.

Assignees

• Western Digital Tech Inc

Inventors

• Dusija Gautam Ashok
• Lee Aaron
• Kochar Mrinal
• Raghu Deepak

Classifications

• G06F11/08

  Error detection or correction by redundancy in data representation, e.g. by using checking codes · CPC title

• G11C16/3436 Primary

  Arrangements for verifying correct programming or erasure · CPC title

• G11C16/26

  Sensing or reading circuits; Data output circuits · CPC title

• G11C11/5642

  Sensing or reading circuits; Data output circuits · CPC title