Systems and methods for microelectronics fabrication and packaging using a magnetic polymer

US10354950B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10354950-B2
Application numberUS-201615053747-A
CountryUS
Kind codeB2
Filing dateFeb 25, 2016
Priority dateFeb 25, 2016
Publication dateJul 16, 2019
Grant dateJul 16, 2019

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A magnetic polymer for use in microelectronic fabrication includes a polymer matrix and a plurality of ferromagnetic particles disposed in the polymer matrix. The magnetic polymer can be part of an insulation layer in an inductor formed in one or more backend wiring layers of an integrated device. The magnetic polymer can also be in the form of a magnetic epoxy layer for mounting contacts of the integrated device to a package substrate.

First claim

Opening claim text (preview).

What is claimed is: 1. A structure comprising: a semiconductor integrated circuit or an integrated passive device comprising a multilevel wiring network fabricated on a semiconductor die, wherein said semiconductor die includes a semiconductor; and an inductor integrated into said multilevel wiring network, wherein said inductor comprises: a planar magnetic core disposed parallel to a wiring plane; a conductive winding that turns around in a spiral manner on the outside of said magnetic core, said conductive winding including at least one level from said multilevel wiring network; and an insulation layer disposed between the magnetic core and the conductive winding, the insulation layer including a magnetically-anisotropic magnetic polymer, the magnetic polymer comprising: a polymer matrix; and a plurality of ferromagnetic particles disposed in the polymer matrix, wherein said magnetic polymer surrounds said magnetic core and said magnetic polymer increases an inductance of said inductor, and said magnetic polymer has a magnetic anisotropy in which the hard axis of magnetization of the magnetic polymer is aligned parallel to the wiring plane. 2. The structure of claim 1 , wherein the inductor forms at least a portion of a switched inductor power converter. 3. The structure of claim 1 , wherein the inductor is configured to induce a magnetic flux parallel to the wiring plane. 4. The structure of claim 1 , wherein the inductor is configured to induce a magnetic flux orthogonal to the wiring plane. 5. A structure comprising: a semiconductor integrated circuit comprising a multilevel wiring network fabricated on a semiconductor die, the semiconductor die disposed parallel to a die plane and including a semiconductor; an inductor integrated into said multilevel wiring network; a plurality of contacts in electrical communication with a top level of the multilevel wiring network; a substrate in electrical communication with the plurality of contacts; and a magnetically-anisotropic magnetic underfill epoxy extending from the top level of the multilevel wiring network to an opposing surface of the substrate, the magnetic underfill epoxy surrounding the contacts, the magnetic underfill epoxy including ferromagnetic particles and having a magnetic anisotropy in which the hard axis of magnetization is aligned parallel to the die plane, wherein the contacts, the substrate, and the magnetic underfill epoxy form a flip-chip attachment to the semiconductor die. 6. The structure of claim 5 , wherein the inductor forms at least a portion of a switched inductor power converter. 7. The structure of claim 6 , wherein the inductor is configured to induce a magnetic flux parallel to the die plane. 8. The structure of claim 6 , wherein the inductor is configured to induce a magnetic flux orthogonal to the die plane. 9. The structure of claim 8 , wherein the magnetic underfill epoxy has a magnetic anisotropy in which a hard axis of magnetization is parallel to the die plane. 10. A structure comprising: an integrated passive device comprising a multilevel wiring network fabricated on a semiconductor die, the integrated passive device disposed parallel to a die plane, the semiconductor die including a semiconductor; an inductor integrated into said multilevel wiring network; a plurality of contacts in electrical communication with a top level of the multilevel wiring network; a substrate in electrical communication with the plurality of contacts; and a magnetically-anisotropic magnetic underfill epoxy extending from the top level of the multilevel wiring network to an opposing surface of the substrate, the magnetic underfill epoxy surrounding the contacts, the magnetic underfill epoxy including ferromagnetic particles and having a magnetic anisotropy in which the hard axis of magnetization is aligned parallel to the die plane, wherein the contacts, the substrate, and the magnetic underfill epoxy form a flip-chip attachment to the integrated passive device. 11. The structure of claim 10 , wherein the inductor forms at least a portion of a switched inductor power converter. 12. The structure of claim 11 , wherein the inductor is configured to induce a magnetic flux parallel to the die plane. 13. The structure of claim 11 , wherein the inductor is configured to induce a magnetic flux orthogonal to the die plane. 14. The structure of claim 5 , wherein said ferromagnetic particles have an average size of less than or equal to 10 microns and the contacts have a size of 30 to 100 microns. 15. The structure of claim 10 , wherein said ferromagnetic particles have an average size of less than or equal to 10 microns and the contacts have a size of 30 to 100 microns. 16. The structure of claim 1 , wherein the semiconductor die has a semiconductor substrate as its base. 17. The structure of claim 16 , wherein the semiconductor die has a transistor in physical contact with the semiconductor substrate. 18. The structure of claim 16 , wherein the semiconductor die has a CMOS device in physical contact with the semiconductor substrate. 19. The structure of claim 1 , wherein the ferromagnetic particles have an average size of less than or equal to 10 microns.

Assignees

Inventors

Classifications

  • materials for magnetic shielding, e.g. ferromagnetic materials · CPC title

  • shielding resins · CPC title

  • of die-attach connectors · CPC title

  • of bump connectors · CPC title

  • comprising metals or metalloids, e.g. PbSn, Ag or Cu · CPC title

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Frequently asked questions

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What does patent US10354950B2 cover?
A magnetic polymer for use in microelectronic fabrication includes a polymer matrix and a plurality of ferromagnetic particles disposed in the polymer matrix. The magnetic polymer can be part of an insulation layer in an inductor formed in one or more backend wiring layers of an integrated device. The magnetic polymer can also be in the form of a magnetic epoxy layer for mounting contacts of th…
Who is the assignee on this patent?
Ferric Inc
What technology area does this patent fall under?
Primary CPC classification H10W20/497. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Jul 16 2019 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 3 related publications on this page (citations in our corpus or others sharing the same primary CPC).