Forming and operating memory devices that utilize correlated electron material (CEM)

Patent metadata

Field	Value
Publication number	US-10340453-B2
Application number	US-201715610288-A
Country	US
Kind code	B2
Filing date	May 31, 2017
Priority date	May 31, 2017
Publication date	Jul 2, 2019
Grant date	Jul 2, 2019

Abstract

Subject matter disclosed herein may relate to fabrication of correlated electron materials (CEMs) devices used, for example, to read from a resistive memory element or to write to a resistive memory element. In embodiments, by limiting current flow through a CEM device, the CEM device may operate in the absence of Mott and/or Mott-like transitions in a way that brings about symmetrical diode-like operation of the CEM device.

First claim

What is claimed is:

1. A device comprising:
a resistive memory element having a first terminal and a second terminal; and
a correlated electron material (CEM) device coupled in series with the resistive memory element, the CEM device to couple with the resistive memory element between a common top electrode and a common bottom electrode in read operations or write operations for the resistive memory element, and wherein the CEM device is configured to operate in a region of an impedance profile that is absent a Mott or Mott-like transition during the read operations or the write operations for the resistive memory element.

2. The device of claim 1 , wherein the region of the impedance profile comprises a monotonically increasing impedance profile over a particular operating voltage domain.

3. The device of claim 1 , wherein the resistive memory element comprises a bipolar resistive memory element, and wherein the CEM device is formed to couple the resistive memory element between the common top electrode and the common bottom electrode during read or write operations of the bipolar resistive memory element.

4. The device of claim 3 , wherein the CEM device is formed to have at least partially symmetric diode operation with respect to current through the device in response to a voltage across the device.

5. The device of claim 1 , wherein the CEM device is formed to have a set voltage that is less than a voltage that brings about a set operation of the resistive memory element.

6. The device of claim 5 , wherein the resistive memory element comprises a read voltage that is greater than the set voltage of the CEM device.

7. The device of claim 5 , wherein the CEM device comprises a set voltage equal to about 1.3 to about 1.8 V, and wherein the resistive memory element comprises a set voltage of at least about 2.0 V.

8. The device of claim 5 , wherein the CEM device comprises a set voltage equal to about −1.3 to about −1.8 V, and wherein the resistive memory element comprises a reset voltage of less than about −2.0 V.

9. The device of claim 1 , wherein the resistive memory element and the CEM device are disposed between a first metal layer and a second metal layer.

10. The device of claim 9 , wherein the first metal layer and the second metal layer are formed at a back-end-of-line of a wafer fabrication process.

11. The device of claim 9 , wherein the resistive memory element and the CEM device are disposed between the first metal layer and the second metal layer in a cross point memory arrangement.

12. The device of claim 11 , wherein the cross point memory arrangement comprises at least one additional layer over the first metal layer and the second metal layer, the at least one additional layer comprising an additional cross point memory arrangement.

13. The device of claim 1 , wherein a CEM forming the CEM device comprises a dopant in an atomic concentration that limits a number of available carriers sufficient to bring about the Mott or Mott-like transition in the region.

14. A method comprising:
applying a voltage signal to a correlated electron material (CEM) device in series with a first terminal and a second terminal of a resistive memory element; and
limiting electrical current flow through the CEM device to bring about operation of the CEM device in a region of an impedance profile that is absent a Mott or Mott-like transition when the CEM device is operating to write to the resistive memory element and when the CEM device is operating to read from the resistive memory element.

15. The method of claim 14 , wherein limiting electrical current flow through the CEM device is performed by the resistive memory element.

16. The method of claim 14 , wherein limiting electrical current flow through the CEM device comprises limiting bidirectional current flow along the region of the impedance profile that is absent the Mott or Mott-like transition.

17. A method comprising:
forming one or more resistive memory elements having first terminals and second terminals; and
forming a correlated electron material (CEM) device to be coupled in series with at least one of the one or more resistive memory elements, the CEM device to operate to perform read operations or write operations in a region of an impedance profile that is absent a Mott or Mott-like transition during the read operations or the write operations of the at least one of the one or more resistive memory elements.

18. The method of claim 17 , further comprising doping the CEM device in an atomic concentration that limits a number of available carriers sufficient to bring about the Mott or Mott-like transition in the region.

19. The method of claim 17 , wherein forming one or more resistive memory elements having first terminals and second terminals occurs at a back-end-of-line of a wafer fabrication process.

20. The method of claim 17 , wherein forming the CEM device occurs at a back-end-of-line of a wafer fabrication process.

21. The method of claim 17 , wherein the one or more resistive memory elements and the CEM device are disposed between two metal layers of a wafer.

Assignees

• Advanced Risc Mach Ltd

Inventors

• Rosendale Glen Arnold
• Shifren Lucian

Classifications

• G11C2013/0045

  Read using current through the cell · CPC title

• G11C2213/73

  Array where access device function, e.g. diode function, being merged with memorizing function of memory element · CPC title

• G11C2213/71

  Three dimensional array · CPC title

• G11C13/003

  Cell access · CPC title

• G11C13/0004

  comprising amorphous/crystalline phase transition cells · CPC title