Folded termination with internal field plate

Patent metadata

Field	Value
Publication number	US-10340332-B2
Application number	US-201615774286-A
Country	US
Kind code	B2
Filing date	Sep 17, 2016
Priority date	Sep 17, 2016
Publication date	Jul 2, 2019
Grant date	Jul 2, 2019

Abstract

A junction termination with an internal field plate, the field plate structure and the junction termination extension region are folded inside the device to make full use of the thickness of the drift region in the body, thereby reducing the area of the termination and relieving the electric field concentration at the end of the PN junction. The breakdown position is transferred from the surface into the body of the original PN junction, and the withstand voltage of termination can reach to the breakdown voltage of the parallel plane junction. Under such design, a smaller area can be obtained than that of the conventional structure at the same withstand voltage.

First claim

We claim:

1. A junction termination with an internal field plate comprising: a heavily doped substrate of a first conductive type semiconductor, a lightly doped drift region of the first conductive type semiconductor on an upper surface of the heavily doped substrate of the first conductive type semiconductor, and a metal drain electrode on a lower surface of the heavily doped substrate of the first conductive type semiconductor; wherein the lightly doped drift region of the first conductive type semiconductor is provided with a trench, and the trench is located in a middle of the lightly doped drift region of the first conductive type semiconductor and extends vertically downward into the lightly doped drift region of the first conductive type semiconductor along an upper surface of the lightly doped drift region of the first conductive type semiconductor, the trench is filled with insulating dielectric; the upper surface of the lightly doped drift region of the first conductive type semiconductor is provided with a field oxide layer; a side of the trench near an active region of a device is provided with a first semiconductor implantation region, and the first semiconductor implantation region is respectively connected to a main junction of a second conductive type semiconductor of the active region and the trench, and an upper surface of the first semiconductor implantation region is in contact with the field oxide layer, a lower surface of the first semiconductor implantation region is in contact with a second semiconductor implantation region, a side of the second semiconductor implantation region is in contact with the trench; the first semiconductor implantation region and the second semiconductor implantation region are both the second conductive type semiconductor, and a concentration of the first semiconductor implantation region is greater than a concentration of the second semiconductor implantation region; an end of the upper surface of the lightly doped drift region of the first conductive type semiconductor, distant from the active region of the device, is provided with a heavily doped region of the first conductive type semiconductor, an upper surface of the heavily doped region of the first conductive type semiconductor is in contact with the field oxide layer; an upper surface of the field oxide layer is provided with a polysilicon layer; a polysilicon field plate is in the trench, and an upper surface of the polysilicon field plate is in contact with the polysilicon layer.

2. The junction termination with the internal field plate according to claim 1 , wherein the polysilicon field plate has an inverted trapezoidal shape in a cross-sectional view of the device, and a junction depth of a lower bottom edge of the polysilicon field plate is larger than a junction depth of the second semiconductor implantation region, a value of angle θ between a side of the polysilicon field plate and a horizontal line is in a range of 60° to 70°.

3. The junction termination with the internal field plate according to claim 2 , wherein a buried layer of the second conductive type semiconductor is provided directly under the trench.

4. The junction termination with the internal field plate according to claim 3 , wherein in the active region of the device, the main junction of the second conductive type semiconductor in contact with the first semiconductor implantation region is arranged on an upper layer of the lightly doped drift region of the first conductive type semiconductor; an upper surface of the main junction of the second conductive type semiconductor, distant from a termination region, is provided with a source metal, and the source metal is in contact with the field oxide layer.

5. The junction termination with the internal field plate according to claim 4 , wherein the main junction of the second conductive type semiconductor is in contact with the polysilicon layer through a contact hole.

6. The junction termination with the internal field plate according to claim 5 , wherein the source metal extends along the upper surface of the field oxide layer to connect with the polysilicon layer, and connects a potential of a source to the polysilicon field plate.

7. The junction termination with the internal field plate according to claim 2 , wherein a lower surface of the trench extends into the heavily doped substrate of the first conductive type semiconductor.

8. The junction termination with the internal field plate according to claim 7 , wherein under the second semiconductor implantation region, a plurality of semiconductor doped regions with successively lower doping levels are provided along a plurality of side walls of the trench.

9. The junction termination with internal field plate according to claim 8 , wherein a buried layer of the second conductive type semiconductor is provided directly under the trench.

10. The junction termination with the internal field plate according to claim 8 , wherein in the active region of the device, the main junction of the second conductive type semiconductor in contact with the first semiconductor implantation region is arranged on an upper layer of the lightly doped drift region of the first conductive type semiconductor; an upper surface of the main junction of the second conductive type semiconductor, distant from a termination region, is provided with a source metal, and the source metal is in contact with the field oxide layer.

11. The junction termination with the internal field plate according to claim 7 , wherein in the active region of the device, the main junction of the second conductive type semiconductor in contact with the first semiconductor implantation region is arranged on an upper layer of the lightly doped drift region of the first conductive type semiconductor; an upper surface of the main junction of the second conductive type semiconductor, distant from a termination region, is provided with a source metal, and the source metal is in contact with the field oxide layer.

12. The junction termination with the internal field plate according to claim 11 , wherein the main junction of the second conductive type semiconductor is in contact with the polysilicon layer through a contact hole.

13. The junction termination with the internal field plate according to claim 12 , wherein the source metal extends along the upper surface of the field oxide layer to connect with the polysilicon layer, and connects a potential of a source to the polysilicon field plate.

14. The junction termination with internal field plate according to claim 12 , wherein a buried layer of the second conductive type semiconductor is provided directly under the trench.

15. The junction termination with internal field plate according to claim 11 , wherein a buried layer of the second conductive type semiconductor is provided directly under the trench.

16. The junction termination with the internal field plate according to claim 2 , wherein in the active region of the device, the main junction of the second conductive type semiconductor in contact with the first semiconductor implantation region is arranged on an upper layer of the lightly doped drift region of the first conductive type semiconductor; an upper surface of the main junction of the second conductive type semiconductor, distant from a termination region, is provided with a source metal, and the source metal is in contact with the field oxide layer.

17. The junction termination with the internal field plate according to claim 16 , wherein the main junction of the second conductive type semiconductor is in contact

Assignees

• Univ Electronic Sci & Tech China
• Inst Of Electronic And Information Engineering Of Uestc In Guangdong

Inventors

• Ren Min
• Zhang Yumeng
• Di Cong
• Xiong Jingzhi
• Li Zehong
• Zhang Jinping
• Gao Wei
• Zhang Bo

Classifications

• H01L29/407

  Electricity · mapped topic

• H01L29/78

  Electricity · mapped topic

• H01L29/0615 Primary

  Electricity · mapped topic

• H01L29/7813

  Electricity · mapped topic

• H10D64/117

  Recessed field plates, e.g. trench field plates or buried field plates · CPC title