Fluorine-free interface for semiconductor device performance gain
US-2024145561-A1 · May 2, 2024 · US
US10325992B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-10325992-B2 |
| Application number | US-201514854272-A |
| Country | US |
| Kind code | B2 |
| Filing date | Sep 15, 2015 |
| Priority date | Mar 2, 2015 |
| Publication date | Jun 18, 2019 |
| Grant date | Jun 18, 2019 |
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A semiconductor device and a method of manufacturing the same are provided. The semiconductor device includes a substrate including a trench. The semiconductor device further includes a gate electrode disposed in the trench, and a gate insulating film disposed between the substrate and the gate electrode. The gate electrode includes a gate conductor and a metal element, and an effective work function of the gate electrode is less than an effective work function of the gate conductor.
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What is claimed is: 1. A semiconductor device comprising: a substrate comprising a trench; a gate insulating film disposed in the trench; a gate electrode disposed in the trench and disposed on the gate insulating film, the gate electrode contacting the gate insulating film, wherein the gate electrode comprises a gate conductor and a metal atom that is diffused into the gate conductor, the gate conductor being chemically bonded with the metal atom, the gate conductor is one among titanium, titanium nitride, and titanium oxynitride, the metal atom is one among lanthanum, strontium, lithium, and manganese, and an effective work function of the gate electrode is less than an effective work function of the gate conductor; and a metal disposed on the gate electrode and filling the trench, the metal being different than the gate conductor and the metal atom diffused into the gate conductor. 2. The semiconductor device of claim 1 , wherein the gate electrode is a continuous thin film having a substantially uniform thickness in the trench along an interior wall of the substrate. 3. The semiconductor device of claim 1 , wherein the gate electrode has a thickness in a range from about 1 nm to about 30 nm. 4. The semiconductor device of claim 1 , wherein a work function and an electronegativity of the metal atom are less than a work function and an electronegativity of the gate conductor. 5. The semiconductor device of claim 1 , wherein the gate conductor is titanium nitride, and the metal atom is lanthanum. 6. The semiconductor device of claim 1 , wherein an amount of the metal atom is in a range from about 0.01 at % to about 10 at % based on a total atom number of the gate conductor and the metal atom. 7. The semiconductor device of claim 1 , wherein the effective work function of the gate electrode is less than the effective work function of the gate conductor by about 0.10 eV to about 1.40 eV. 8. The semiconductor device of claim 1 , wherein the gate insulating film is a silicon oxide film. 9. A method of manufacturing a semiconductor device, the method comprising: providing a substrate comprising a trench; forming a gate insulating film in the trench; forming a metal oxide film on the gate insulating film, the metal oxide film comprising a metal atom that is one among lanthanum, strontium, lithium, and manganese; forming a gate conductive layer directly on the metal oxide film; and heating the metal oxide film to diffuse the metal atom of the metal oxide film into the gate conductive layer. 10. The method of claim 9 , wherein each of the forming the gate insulating film, the forming the metal oxide film, and the forming the gate conductive layer comprises forming a continuous thin film having a substantially uniform thickness in the trench along an interior wall of the substrate. 11. The method of claim 9 , wherein the forming the gate conductive layer comprises depositing, on the metal oxide film, one among titanium, titanium nitride, and titanium oxynitride, and the forming the metal oxide film comprises depositing, on the gate insulating film, one among a lanthanum oxide, a strontium oxide, a yttrium oxide, a lithium oxide, a manganese oxide, and a silicon oxide. 12. The method of claim 9 , wherein the metal oxide film has a thickness in a range from about 0.1 nm to about 3 nm. 13. The method of claim 9 , wherein the forming the gate insulating film comprises: depositing, in the trench, a silicon oxide; or thermal-oxidizing the substrate to form the silicon oxide. 14. The method of claim 9 , wherein the heating is performed in a range from about 600° C. to about 1200° C. for about 10 minutes to about 20 hours. 15. The method of claim 9 , further comprising filling the trench with a metal. 16. A semiconductor device comprising: a substrate comprising a trench; a gate insulating film disposed in the trench; a gate electrode disposed in the trench and disposed on the gate insulating film, the gate electrode contacting the gate insulating film, the gate electrode consisting of a gate conductor and a metal atom that is diffused into the gate conductor, the gate conductor being one among titanium, titanium nitride, and titanium oxynitride, the metal atom being one among lanthanum, strontium, lithium, and manganese, and a work function of the metal atom being less than a work function of the gate conductor; and a metal disposed in the trench and disposed on the gate electrode, the metal being different than the gate conductor and the metal atom diffused into the gate conductor. 17. The semiconductor device of claim 1 , wherein the metal is tungsten or tungsten alloy.
the conductor comprising a layer of alloy material, compound material or organic material contacting the insulator, e.g. TiN (comprising a layer of alloys of Si, Ge or C H10D64/01314) · CPC title
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
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