Cost-efficient high power PECVD deposition for solar cells

Patent metadata

Field	Value
Publication number	US-10319872-B2
Application number	US-201213468292-A
Country	US
Kind code	B2
Filing date	May 10, 2012
Priority date	May 10, 2012
Publication date	Jun 11, 2019
Grant date	Jun 11, 2019

Abstract

A method for forming a photovoltaic device includes providing a substrate. A layer is deposited to form one or more layers of a photovoltaic stack on the substrate. The depositing of the amorphous layer includes performing a high power flash deposition for depositing a first portion of the layer. A low power deposition is performed for depositing a second portion of the layer.

First claim

What is claimed is:

1. A method for forming a photovoltaic device, comprising:
providing a substrate; and
depositing a buffer layer of a photovoltaic stack directly on a transparent electrode and between said transparent electrode of zinc oxide and a p-type layer of hydrogenated silicon carbide having a germanium content less than the buffer layer, wherein the buffer layer being a single material layer of silicon germanium is in direct contact with both the transparent electrode and the p-type layer of the photovoltaic stack, the buffer layer comprises a p-type dopant selected from a group consisting of Ga, In and a combination thereof, wherein the depositing the buffer layer comprises using a chemical vapor deposition (CVD) apparatus that includes a high power generator and a low power generator that are separate power generators and are both in communication to an electrode in a single deposition chamber of the PCVD apparatus, the depositing of the single layer includes the steps of:
performing a high power flash deposition for depositing a first portion of the buffer layer on the substrate within the single deposition chamber, the high power flash deposition employing only the high power generator, wherein the high power flash deposition forms a first portion of the germanium containing material layers having a increasing crystallinity with increasing depth;
performing a low power deposition for depositing a second portion of the buffer layer on the substrate within the single deposition chamber, the lower power deposition employing only the low power generator, wherein the low power deposition forms a second portion of the germanium containing material layers that is amorphous to provide the single layer for the buffer layer and a varying crystal structure having said first portion with said increasing crystallinity with said increasing depth and said second portion being said amorphous, wherein the increasing crystallinity is in a direction towards the p-type layer of hydrogenated silicon to provide for alignment of a conduction band of the buffer layer and the p-type layer of hydrogenated silicon to reduce a Schottky barrier between the buffer layer and the p-type layer of hydrogenated silicon; and

forming a intrinsic layer of amorphous silicon on the p-type layer of hydrogenated silicon carbide and an n-type silicon layer to provide a PIN junction.

2. The method as recited in claim 1 , wherein the buffer layer includes germanium deposited on the transparent electrode.

3. The method as recited in claim 1 , wherein performing a high power flash deposition includes depositing a thickness of less than about 5 nm in less than about 5 seconds.

4. The method as recited in claim 1 , wherein performing a high power flash deposition includes providing a plasma enhanced chemical vapor deposition at a power of between about 100 mW/cm 2 and about 100 W/cm 2 , wherein the low power deposition has a power between about 1.0 mW/cm 2 to about 100 mW/cm 2 , wherein the power of the lower power deposition is less than the power of the high power flash deposition.

5. The method as recited in claim 1 , wherein performing a high power flash deposition includes pulsing the high power flash deposition to form multiple thicknesses of high power flash deposited material in a same layer.

6. The method as recited in claim 1 , wherein depositing the one or more layers includes depositing layers with increased crystallinity for a p-type layer and a buffer layer, the buffer layer being formed between a transparent electrode on the substrate and the p-type layer.

7. The method as recited in claim 1 , wherein the high power flash deposition is performed before the low power deposition.

8. The method as recited in claim 1 , wherein the high power flash deposition is performed after the low power deposition.

9. The method as recited in claim 1 , wherein the Schottky barrier is eliminated.

10. A method for forming a photovoltaic device, comprising:
providing a substrate including a transparent electrode; and
depositing a buffer layer of a single material layer of silicon germanium directly on the transparent electrode of zinc oxide and between and in direct contact with said transparent electrode and a p-type layer of hydrogenated silicon in a photovoltaic stack using a chemical vapor deposition (CVD) apparatus that includes a high power generator and a low power generator that separate power generators and are both in communication to an electrode in a single deposition chamber of the CVD apparatus, the p-type layer of hydrogenated silicon having a germanium content less than the buffer layer, and the buffer layer comprising a p-type dopant selected from a group consisting of Ga, In and a combination thereof, the depositing of the buffer layer including the steps of:
performing a high power flash deposition for depositing a first portion of the buffer layer to increase crystallinity and conductivity of the buffer layer on the substrate within the single deposition chamber, the high power flash deposition employing only the high power generator, wherein the high power flash deposition forms a first portion of the germanium containing material layers having a increasing crystallinity with increasing depth;
performing a low power deposition for depositing a second portion of the buffer layer and having a more amorphous form on the substrate within the single deposition chamber, the lower power deposition employing only the low power generator, wherein the low power deposition forms a second portion of the germanium containing material layers that is amorphous to provide the single layer for the buffer layer of silicon germanium and having a varying crystal structure having said first portion with said increasing crystallinity with said increasing depth and said second portion being said amorphous, wherein the increasing crystallinity is in a direction towards the p-type layer of hydrogenated silicon to provide for alignment of a conduction band of the buffer layer and the p-type layer of hydrogenated silicon to reduce a Schottky barrier between the buffer layer and the p-type layer of hydrogenated silicon; and

forming an intrinsic layer of amorphous silicon on the p-type layer of hydrogenated silicon carbide and an n-type silicon layer to provide a PIN junction.

11. The method as recited in claim 10 , wherein the buffer layer includes germanium deposited on the transparent electrode.

12. The method as recited in claim 10 , wherein performing a high power flash deposition includes depositing a thickness of less than about 5 nm in less than about 5 seconds.

13. The method as recited in claim 10 , wherein performing a high power flash deposition includes providing a plasma enhanced chemical vapor deposition at a power of between about 100 mW/cm 2 and about 100 W/cm 2 , wherein the low power deposition has a power between about 1.0 mW/cm 2 to about 100 mW/cm 2 , wherein the power of the lower power deposition is less than the power of the high power flash deposition.

14. The method as recited in claim 10 , wherein performing a high power flash deposition includes pulsing the high power flash deposition to form multiple thicknesses of high power flash deposited material in a same layer.

15. The method as recited in claim 10 , further comprising depositing the p-type layer by performing a high power flash deposition for depositing a first portion of the p-type layer and performing a low power deposition for depositing a second portion of the p-type layer.

16. The method as recited in claim 10 , wherein the high power flash deposition is

Assignees

• Chen Tze Chiang
• Hong Augustin J
• Kim Jeehwan
• Sadana Devendra K
• IBM

Inventors

• Chen Tze-Chiang
• Hong Augustin J
• Kim Jeehwan
• Sadana Devendra K

Classifications

• H10P14/3411

  Silicon, silicon germanium or germanium · CPC title

• H10P14/24

  using chemical vapour deposition [CVD] · CPC title

• C23C16/45523

  Pulsed gas flow or change of composition over time · CPC title

• Y02E10/546

  Polycrystalline silicon PV cells · CPC title

• Y02E10/548

  Amorphous silicon PV cells · CPC title