Wafer thinning method

US10319593B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10319593-B2
Application numberUS-201615209292-A
CountryUS
Kind codeB2
Filing dateJul 13, 2016
Priority dateJul 21, 2015
Publication dateJun 11, 2019
Grant dateJun 11, 2019

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

Disclosed herein is a wafer thinning method for thinning a wafer formed from an SiC substrate having a first surface and a second surface opposite to the first surface. The wafer thinning method includes an annular groove forming step of forming an annular groove on the second surface of the SiC substrate in an annular area corresponding to the boundary between a device area and a peripheral marginal area in the condition where a thickness corresponding to the finished thickness of the wafer after thinning is left, and a separation start point forming step of applying the laser beam to the second surface as relatively moving a focal point and the SiC substrate to thereby form a modified layer and cracks inside the SiC substrate at the predetermined depth.

First claim

Opening claim text (preview).

What is claimed is: 1. A wafer thinning method for thinning a wafer to a finished thickness formed from an SiC substrate having a first surface, a second surface opposite to said first surface, a c-axis extending from said first surface to said second surface, and a c-plane perpendicular to said c-axis, said first surface of said SiC substrate having a device area where a plurality of devices are formed and a peripheral marginal area surrounding said device area, said wafer thinning method comprising: providing a wafer formed from an SiC substrate having a first surface, a second surface opposite to said first surface, a c-axis extending from said first surface to said second surface, and a c-plane perpendicular to said c-axis, where said c-plane is set in the SiC substrate at the molecular level, where said c-axis is inclined by an off angle with respect to a normal to said first surface, where said c-axis and said normal to the first surface intersect each other, and thereby said c-plane is inclined by said off angle with respect to the first surface, and said first surface of said SiC substrate having a device area where a plurality of devices are formed and a peripheral marginal area surrounding said device area; an annular groove forming step of forming an annular groove on said second surface of said SiC substrate in an annular area corresponding to the boundary between said device area and said peripheral marginal area in a condition where a thickness corresponding to the finished thickness is left; a separation start point forming step of setting the focal point of a laser beam having a transmission wavelength to said SiC substrate inside said SiC substrate in a central area surrounded by said annular groove at a predetermined depth from said second surface, which depth corresponds to the finished thickness, and next applying said laser beam to said second surface while relatively moving said focal point and said SiC substrate to thereby form a modified layer inside said SiC substrate at said predetermined depth in said central area and also form cracks extending from said modified layer along said c-plane, thus forming a separation start point; and a wafer thinning step of applying an external force to said wafer after performing said separation start point forming step, thereby separating said wafer at said separation start point into a first wafer of the finished thickness and having said first surface of said SiC substrate and a second wafer having said second surface of said SiC substrate, and wherein a ring-shaped reinforcing portion is formed on a back side of said first wafer in a peripheral area corresponding to said peripheral marginal area; said separation start point forming step including: a modified layer forming step of relatively moving the focal point of said laser beam in a first direction, where the first direction is perpendicular to a second direction, and further wherein said second direction is defined as a direction parallel to a line connecting a point where said c-axis intersects said first surface to a to a point where said normal intersects said first surface, thereby linearly forming said modified layer extending in said first direction, and an indexing step of relatively moving said focal point in said second direction to thereby index said focal point by a predetermined amount. 2. The wafer thinning method according to claim 1 , further comprising: a grinding step of grinding the back side of said first wafer having said first surface except said ring-shaped reinforcing portion after performing said wafer thinning step, thereby flattening the back side of said first wafer except said ring-shaped reinforcing portion. 3. The wafer thinning method according to claim 1 , wherein said external force of said wafer thinning step comprises applying a torsional stress to said wafer. 4. The wafer thinning method according to claim 2 , wherein said external force of said wafer thinning step comprises applying a torsional stress to said wafer.

Assignees

Inventors

Classifications

  • used to protect an active side of a device or wafer · CPC title

  • used during dicing or grinding · CPC title

  • Apparatus for mechanical treatment or grinding or cutting · CPC title

  • Wafer tapes, e.g. grinding or dicing support tapes · CPC title

  • Grinding, lapping or polishing of wafers, substrates or parts of devices · CPC title

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What does patent US10319593B2 cover?
Disclosed herein is a wafer thinning method for thinning a wafer formed from an SiC substrate having a first surface and a second surface opposite to the first surface. The wafer thinning method includes an annular groove forming step of forming an annular groove on the second surface of the SiC substrate in an annular area corresponding to the boundary between a device area and a peripheral ma…
Who is the assignee on this patent?
Disco Corp
What technology area does this patent fall under?
Primary CPC classification H10P50/00. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Jun 11 2019 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 12 related publications on this page (citations in our corpus or others sharing the same primary CPC).