Ensuring forward progress for nested translations in a memory management unit

US10318435B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10318435-B2
Application numberUS-201715683615-A
CountryUS
Kind codeB2
Filing dateAug 22, 2017
Priority dateAug 22, 2017
Publication dateJun 11, 2019
Grant dateJun 11, 2019

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Abstract

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Ensuring forward progress for nested translations in a memory management unit (MMU) including receiving a plurality of nested translation requests, wherein each of the plurality of nested translation requests requires at least one congruence class lock; detecting, using a congruence class scoreboard, a collision of the plurality of nested translation requests based on the required congruence class locks; quiescing, in response to detecting the collision of the plurality of nested translation requests, a translation pipeline in the MMU including switching operation of the translation pipeline from a multi-thread mode to a single-thread mode and marking a first subset of the plurality of nested translation requests as high-priority nested translation requests; and servicing the high-priority nested translation requests through the translation pipeline in the single-thread mode.

First claim

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What is claimed is: 1. A computer processor for ensuring forward progress for nested translations in a memory management unit (MMU), the computer processor configured to carry out the steps of: receiving a plurality of nested translation requests, wherein each of the plurality of nested translation requests requires at least one congruence class lock indicating an exclusive use of a congruence class comprising a portion of a lookaside buffer, and wherein translation of each of the plurality of translation requests requires a primary translation table and a second translation table; detecting, using a congruence class scoreboard tracking congruence class locks and congruence class reservations, a collision of the plurality of nested translation requests, wherein the collision comprises a state in which one or more of the nested translation requests cannot proceed due to the required congruence class locks; quiescing, in response to detecting the collision of the plurality of nested translation requests, a translation pipeline in the MMU including switching operation of the translation pipeline from a multi-thread mode to a single-thread mode and marking a first subset of the plurality of nested translation requests as high-priority nested translation requests; and servicing the high-priority nested translation requests through the translation pipeline in the single-thread mode. 2. The computer processor of claim 1 , further configured to carry out the steps of: switching operation of the translation pipeline from the single-thread mode to the multi-thread mode in response to determining that the high-priority nested translation requests have been serviced; and servicing a second subset of the plurality of nested translation requests in multi-thread mode. 3. The computer processor of claim 1 , wherein marking the subset of the plurality of nested translation request as high priority nested translation requests comprises: determining that a first nested transition request of the plurality of nested translation requests has obtained a congruence class lock on a congruence class; releasing the congruence class lock obtained by the first nested translation request; and marking the first nested translation request as a high priority nested translation request. 4. The computer processor of claim 1 , wherein the congruence class scoreboard comprises a primary congruence class scoreboard and a secondary congruence class scoreboard, wherein the primary congruence class scoreboard is a data structure that tracks congruence class reservations and congruence class locks for the primary translation table, and wherein the secondary congruence class scoreboard is a data structure that tracks congruence class reservations and congruence class locks for the second translation table. 5. The computer processor of claim 1 , wherein detecting the collision of the plurality of nested translation requests comprises detecting a hang condition caused by the congruence class locks of at least two of the plurality of nested translations. 6. The computer processor of claim 1 , wherein quiescing the translation pipeline in the MMU further comprises notifying each source of a second subset of the plurality of nested translation requests that the nested translation requests have failed. 7. The computer processor of claim 1 , wherein marking the subset of the plurality of nested translation request as high priority nested translation requests comprises instructing a source of each of the subset of nested translation request to resend the nested translation request as a high-priority nested translation request. 8. A computing system, the computing system including a computer processor for ensuring forward progress for nested translations in a memory management unit (MMU), the computer processor configured to carry out the steps of: receiving a plurality of nested translation requests, wherein each of the plurality of nested translation requests requires at least one congruence class lock indicating an exclusive use of a congruence class comprising a portion of a lookaside buffer, and wherein translation of each of the plurality of translation requests requires a primary translation table and a second translation table; detecting, using a congruence class scoreboard tracking congruence class locks and congruence class reservations, a collision of the plurality of nested translation requests, wherein the collision comprises a state in which one or more of the nested translation requests cannot proceed due to the required congruence class locks; quiescing, in response to detecting the collision of the plurality of nested translation requests, a translation pipeline in the MMU including switching operation of the translation pipeline from a multi-thread mode to a single-thread mode and marking a first subset of the plurality of nested translation requests as high-priority nested translation requests; and servicing the high-priority nested translation requests through the translation pipeline in the single-thread mode. 9. The computing system of claim 8 , the computer processor further configured to carry out the steps of: switching operation of the translation pipeline from the single-thread mode to the multi-thread mode in response to determining that the high-priority nested translation requests have been serviced; and servicing a second subset of the plurality of nested translation requests in multi-thread mode. 10. The computing system of claim 8 , wherein marking the subset of the plurality of nested translation request as high priority nested translation requests comprises: determining that a first nested transition request of the plurality of nested translation requests has obtained a congruence class lock on a congruence class; releasing the congruence class lock obtained by the first nested translation request; and marking the first nested translation request as a high priority nested translation request. 11. The computing system of claim 8 , wherein the congruence class scoreboard comprises a primary congruence class scoreboard and a secondary congruence class scoreboard, wherein the primary congruence class scoreboard is a data structure that tracks congruence class reservations and congruence class locks for the primary translation table, and wherein the secondary congruence class scoreboard is a data structure that tracks congruence class reservations and congruence class locks for the second translation table. 12. The computing system of claim 8 , wherein detecting the collision of the plurality of nested translation requests comprises detecting a hang condition caused by the congruence class locks of at least two of the plurality of nested translations. 13. The computing system of claim 8 , wherein marking the subset of the plurality of nested translation request as high priority nested translation requests comprises instructing a source of each of the subset of nested translation request to resend the nested translation request as a high-priority nested translation request.

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Classifications

  • using page tables, e.g. page table structures · CPC title

  • Multi-level translation tables · CPC title

  • Thread control instructions · CPC title

  • Pipeline control instructions, e.g. multicycle NOP · CPC title

  • using associative or pseudo-associative address translation means, e.g. translation look-aside buffer [TLB] · CPC title

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What does patent US10318435B2 cover?
Ensuring forward progress for nested translations in a memory management unit (MMU) including receiving a plurality of nested translation requests, wherein each of the plurality of nested translation requests requires at least one congruence class lock; detecting, using a congruence class scoreboard, a collision of the plurality of nested translation requests based on the required congruence cl…
Who is the assignee on this patent?
IBM
What technology area does this patent fall under?
Primary CPC classification G06F12/1009. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Jun 11 2019 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 12 related publications on this page (citations in our corpus or others sharing the same primary CPC).