Systems and methods for memory power saving via kernel steering to memory balloons

US10310757B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10310757-B2
Application numberUS-201715684838-A
CountryUS
Kind codeB2
Filing dateAug 23, 2017
Priority dateAug 23, 2017
Publication dateJun 4, 2019
Grant dateJun 4, 2019

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

Systems, methods, and computer programs are disclosed for reducing memory power consumption. An exemplary method comprises configuring a power saving memory balloon associated with a volatile memory. Memory allocations are steered to the power saving memory balloon. In response to initiating a memory power saving mode, data is migrated from the power saving memory balloon. A power saving feature is executed on the power saving memory balloon while in the memory power saving mode.

First claim

Opening claim text (preview).

What is claimed is: 1. A method for reducing memory power consumption in a volatile memory, the method comprising: configuring a plurality of power saving memory balloons associated with the volatile memory; steering memory allocations to the plurality of power saving memory balloons, the memory allocations including movable pages migratable to other power saving memory balloons and non-movable pages not migratable to other power saving memory balloons; in response to initiating a memory power saving mode, determining which of the plurality of power saving memory balloons is preferred over others of the plurality of power saving memory balloons to execute a memory power saving feature on, wherein the determination is based at least in part on whether a power saving memory balloon is allocated one or more non-movable pages; cleaning up data from the preferred power saving memory balloon; and executing the memory power saving feature on the preferred power saving memory balloon while in the memory power saving mode. 2. The method of claim 1 , wherein the volatile memory comprises a dynamic random access memory (DRAM). 3. The method of claim 1 , wherein a size of the power saving memory balloon is determined by a memory monitor. 4. The method of claim 1 , wherein the determination is based on, for each power saving memory balloon, whether the power saving memory balloon is allocated one or more non-movable pages and how many pages are active in the power saving memory balloon. 5. The method of claim 1 , wherein the memory allocations are steered to the power saving memory balloon based on one or more user-defined parameters specified via a user interface. 6. The method of claim 1 , wherein the power saving mode comprises one of a DRAM rank power down, a partial array self refresh, or partial array active refresh. 7. The method of claim 1 , wherein the memory power saving mode is initiated by a user command, a user-specified condition, or a remaining battery threshold. 8. A system for reducing memory power consumption in a volatile memory, the system comprising: means for configuring a plurality of power saving memory balloons associated with the volatile memory; means for steering memory allocations to the plurality of power saving memory balloons the memory allocations including movable pages migratable to other power saving memory balloons and non-movable pages not migratable to other power saving memory balloons; means for, in response to initiating a memory power saving mode, determining which of the plurality of power saving memory balloons is preferred over others of the plurality of power saving memory balloons to execute a memory power saving feature on, wherein the determination is based at least in part on whether a power saving memory balloon is allocated one or more non-movable pages; means for migrating data from the preferred power saving memory balloon; and means for executing the memory power saving feature on the preferred power saving memory balloon while in the memory power saving mode. 9. The system of claim 8 , wherein the volatile memory comprises a dynamic random access memory (DRAM). 10. The system of claim 8 , wherein a size of the power saving memory balloon is determined by a means for monitoring usage. 11. The system of claim 8 , wherein the determination is based on, for each power saving memory balloon, whether the power saving memory balloon is allocated one or more non-movable pages and how many pages are active in the power saving memory balloon. 12. The system of claim 8 , wherein the memory allocations are steered to the power saving memory balloon based on one or more user-defined parameters specified via a user interface. 13. The system of claim 8 , wherein the power saving feature comprises one of a rank power down, partial array self refresh, and partial array auto refresh. 14. The system of claim 8 , wherein the memory power saving mode is initiated by a user command, a user-specified condition, or a remaining battery threshold. 15. A system for reducing memory power consumption, the system comprising: a volatile random access memory; and a system on chip (SoC) comprising a memory controller and a kernel memory manager, the memory controller electrically coupled to the volatile random access memory, and the kernel memory manager comprising logic configured to: configure a plurality of power saving memory balloons associated with the volatile memory; steer memory allocations to the plurality of power saving memory balloons, the memory allocations including movable pages migratable to other power saving memory balloons and non-movable pages not migratable to other power saving memory balloons; in response to initiating a memory power saving mode, determine which of the plurality of power saving memory balloons is preferred over others of the plurality of power saving memory balloons to execute a memory power saving feature on, wherein the determination is based at least in part on whether a power saving memory balloon is allocated one or more non-movable pages; migrate data from the preferred power saving memory balloon; and execute the memory power saving feature on the preferred power saving memory balloon while in the memory power saving mode. 16. The system of claim 15 , wherein the volatile memory comprises a dynamic random access memory (DRAM). 17. The system of claim 15 , wherein a size of the power saving memory balloon is determined by a memory monitor. 18. The system of claim 15 , wherein the determination is based on, for each power saving memory balloon, whether the power saving memory balloon is allocated one or more non-movable pages and how many pages are active in the power saving memory balloon. 19. The system of claim 15 , wherein the memory allocations are steered to the power saving memory balloon based on one or more user-defined parameters specified via a user interface. 20. The system of claim 15 , wherein the power saving mode comprises one of a rank power down, a partial array self refresh, or a partial array auto refresh. 21. The system of claim 15 , wherein the memory power saving mode is initiated by a user command, a user-specified condition, or a remaining battery threshold. 22. The system of claim 15 incorporated in a portable computing device. 23. The system of claim 15 , wherein the portable computing device comprises one of a tablet computer, a smart phone, and a wearable computing device. 24. A computer program embodied in a non-transitory computer readable medium and executed by a processor for reducing memory power consumption in a volatile memory, the computer program comprising logic configured to: configure a plurality of power saving memory balloons associated with the volatile memory; steer memory allocations to the plurality of power saving memory balloons, the memory allocations including movable pages migratable to other power saving memory balloons and non-movable pages not migratable to other power saving memory balloons; in response to initiating a memory power saving mode, determine which of the plurality of power saving memory balloons is preferred over others of the plurality of power saving memory balloons to execute a memory power saving feature on, wherein the determination is based at least in part on whether a power saving memory balloon is allocated one or more non-movable pages; migrate data from the preferred power saving memo

Assignees

Inventors

Classifications

  • Migration mechanisms · CPC title

  • Single storage device · CPC title

  • Command handling arrangements, e.g. command buffers, queues, command scheduling · CPC title

  • G06F3/0625Primary

    Power saving in storage systems · CPC title

  • G06F1/3225Primary

    of memory devices · CPC title

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What does patent US10310757B2 cover?
Systems, methods, and computer programs are disclosed for reducing memory power consumption. An exemplary method comprises configuring a power saving memory balloon associated with a volatile memory. Memory allocations are steered to the power saving memory balloon. In response to initiating a memory power saving mode, data is migrated from the power saving memory balloon. A power saving featur…
Who is the assignee on this patent?
Qualcomm Inc
What technology area does this patent fall under?
Primary CPC classification G06F3/0625. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Jun 04 2019 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 5 related publications on this page (citations in our corpus or others sharing the same primary CPC).