Channel loss compensation circuits

US10298277B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10298277-B2
Application numberUS-201615377283-A
CountryUS
Kind codeB2
Filing dateDec 13, 2016
Priority dateNov 30, 2015
Publication dateMay 21, 2019
Grant dateMay 21, 2019

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A circuit includes a transmitter associated with a carrier of a radio frequency interconnect, a transmission channel communicatively coupled with the transmitter, and a receiver communicatively coupled with the transmission channel, the receiver also being associated with the carrier of the radio frequency interconnect. A combiner on a transmitter-side of the transmission channel is coupled between the transmitter and the transmission channel, and a decoupler on a receiver-side of the transmission channel is coupled between the receiver and the transmission channel. A channel loss compensation circuit is communicatively coupled between the transmitter and the receiver.

First claim

Opening claim text (preview).

What is claimed is: 1. A transmitter circuit, comprising: a plurality of transmitters, each transmitter of the plurality of transmitters being configured to modulate a carrier of a plurality of carriers using a subset of transmission data to generate a transmission signal of a plurality of transmission signals; a combiner configured to receive the plurality of transmission signals from the plurality of transmitters and output a combined transmission signal to a transmission channel; and a gain compensation driver configured to modify one of a transmission signal of the plurality of transmission signals or the combined transmission signal, wherein the gain compensation driver modification is based on a frequency-dependent loss of the combined transmission signal introduced by the transmission channel. 2. The transmitter circuit of claim 1 , wherein the gain compensation driver is one gain compensation driver of a plurality of gain compensation drivers, and each gain compensation driver of the plurality of gain compensation drivers is configured to modify a corresponding transmission signal of the plurality of transmission signals. 3. The transmitter circuit of claim 2 , wherein each gain compensation driver of the plurality of gain compensation drivers is configured to receive a corresponding carrier of the plurality of carriers, and modify the corresponding transmission signal of the plurality of transmission signals by applying a gain factor based on the corresponding carrier of the plurality of carriers. 4. The transmitter circuit of claim 2 , wherein each gain compensation driver of the plurality of gain compensation drivers is configured to receive a corresponding carrier of the plurality of carriers, and modify the corresponding transmission signal of the plurality of transmission signals by applying a delay based on the corresponding carrier of the plurality of carriers. 5. The transmitter circuit of claim 1 , wherein the gain compensation driver is configured to apply a gain factor to the one of the transmission signal of the plurality of transmission signals or the combined transmission signal based on an estimated value of the frequency-dependent loss of the transmission channel. 6. The transmitter circuit of claim 5 , wherein the estimated value of the frequency-dependent loss of the transmission channel is based on measured results from passing signals through the transmission channel. 7. A transmitter circuit, comprising: a plurality of transmitters, each transmitter of the plurality of transmitters being configured to output a modulated carrier signal of a plurality of modulated carrier signals based on a subset of transmission data; a gain compensation driver configured to receive and modify a modulated carrier signal of the plurality of modulated carrier signals, the gain compensation driver having an output configured to transmit an output signal; and a combiner configured to receive a plurality of signals, including the output signal, wherein the gain compensation driver modification is based on a frequency-dependent loss of the output signal introduced by a transmission channel. 8. The transmitter circuit of claim 7 , wherein the gain compensation driver comprises: a delay element configured to receive the modulated carrier signal and to generate a delayed signal; and a gain amplifier configured to receive and amplify the delayed signal by a gain level, wherein the gain amplifier is electrically coupled to the combiner. 9. The transmitter circuit of claim 8 , wherein the gain compensation driver further comprises: an adder configured to receive the amplified delay signal and the modulated carrier signal, and to generate the output signal. 10. The transmitter circuit of claim 8 , wherein the delay element comprises a phase detector and a voltage controlled delay line, and the phase detector is configured to output a voltage control signal based on the modulated carrier signal and the delayed signal, and the voltage controlled delay line is configured to modify an amount the modulated carrier signal is delayed based on the voltage control signal. 11. The transmitter circuit of claim 7 , wherein the combiner is configured to be coupled with a transmission channel. 12. The transmitter circuit of claim 7 , comprising a plurality of gain compensation drivers, including the gain compensation driver, electrically coupled to the combiner. 13. The transmitter circuit of claim 7 , wherein the gain compensation driver is configured to apply a delay having a value based on the output signal. 14. The transmitter circuit of claim 7 , wherein the gain compensation driver is configured to apply a gain factor having a value based on the output signal. 15. The transmitter circuit of claim 7 , wherein the gain compensation driver is configured to apply a gain factor having a selectable value. 16. The transmitter circuit of claim 7 , wherein the gain compensation driver is configured to apply a gain factor having a value based on the frequency-dependent loss of the transmission channel. 17. The transmitter circuit of claim 16 , wherein the value based on the frequency-dependent loss is a predetermined value based on measured results from passing signals through the transmission channel. 18. A transmitter circuit, comprising: a plurality of transmitters, each transmitter of the plurality of transmitters being configured to output a modulated carrier signal of a plurality of modulated carrier signals based on a subset of transmission data; an adder configured to receive a modulated carrier signal of the plurality of modulated carrier signals; a delay element configured to receive the modulated carrier signal; an amplifier electrically coupled to the adder and the delay element; and a combiner electrically coupled to the adder, wherein the adder, the delay element, and the amplifier are configured to modify the modulated carrier signal based on a frequency-dependent loss of the modulated carrier signal introduced by a transmission channel. 19. The transmitter circuit of claim 18 , wherein the delay element comprises a phase detector and a voltage controlled delay line. 20. The transmitter circuit of claim 19 , wherein the phase detector is configured to output a voltage control signal, and the voltage controlled delay line is configured to modify an amount the modulated carrier signal is delayed based on the voltage control signal.

Assignees

Inventors

Classifications

  • for decoupling, e.g. bypass capacitors · CPC title

  • H10W44/20Primary

    at high-frequency [HF] or radio frequency [RF] · CPC title

  • Shaping networks in transmitter or receiver, e.g. adaptive shaping networks · CPC title

  • Input circuits, e.g. for coupling to an antenna or a transmission line (coupling networks between antennas or lines and receivers independent of the nature of the receiver H03H) · CPC title

  • Transmitters with multiple parallel paths · CPC title

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What does patent US10298277B2 cover?
A circuit includes a transmitter associated with a carrier of a radio frequency interconnect, a transmission channel communicatively coupled with the transmitter, and a receiver communicatively coupled with the transmission channel, the receiver also being associated with the carrier of the radio frequency interconnect. A combiner on a transmitter-side of the transmission channel is coupled bet…
Who is the assignee on this patent?
Taiwan Semiconductor Mfg Co Ltd
What technology area does this patent fall under?
Primary CPC classification H10W44/20. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue May 21 2019 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 6 related publications on this page (citations in our corpus or others sharing the same primary CPC).