Resistive memory accelerator

Patent metadata

Field	Value
Publication number	US-10297315-B2
Application number	US-201715657288-A
Country	US
Kind code	B2
Filing date	Jul 24, 2017
Priority date	Aug 5, 2015
Publication date	May 21, 2019
Grant date	May 21, 2019

Abstract

Presented is a method and apparatus for solving. The method includes receiving, by a resistive memory array, a first data, the resistive memory array comprising a plurality of cells, wherein the receiving comprises setting a plurality of resistances on the plurality of cells, wherein each of the plurality of resistances are based on the first data. The method further includes receiving, by the resistive memory array, a second data, wherein the receiving comprises applying at least one of a current and a voltage based on the second data on the plurality of cells. The method still further includes determining, by the resistive memory array, an initial unknown value, the initial value based on the first data and the second data.

First claim

The invention claimed is:

1. An apparatus for solving, the apparatus comprising:
(a) at least one resistive memory array, the resistive memory array comprising a plurality of crosspoint cells, a plurality of digital-to-analog converters, a plurality of analog-to-digital converters, a plurality of voltage sources, and a plurality of current sources, each one of the plurality of crosspoint cells comprising at least one resistor, the at least one resistive memory array programmable by the plurality of current sources and the plurality of voltage sources, and wherein the programmable at least one resistive memory array comprises setting a plurality of resistances on the plurality of resistors based on applying a programmable current from the plurality of current sources and a programmable voltage from the plurality of voltage sources; and
(b) at least one sensor, the at least one sensor being operatively coupled to the at least one resistive memory array able to sense at least one of a voltage and a current on the plurality of crosspoint cells.

2. The apparatus according to claim 1 , wherein the at least one resistive memory array is able to determine an unknown value based on the current and the voltage on the plurality of resistors.

3. The apparatus according to claim 2 , wherein the current is based on a coefficient matrix of a system of linear equations.

4. The apparatus according to claim 3 , wherein the voltage is based on a known b-vector or a known x-vector of the system of linear equations.

5. The apparatus according to claim 4 , wherein the initial unknown value comprises a possible solution to the system of linear equations.

6. An apparatus for solving, the apparatus comprising:
at least one resistive memory array, the resistive memory array comprising a plurality of crosspoint cells, a plurality of digital-to-analog converters, a plurality of analog-to-digital converters, a plurality of voltage sources, and a plurality of current sources, wherein each one of the plurality of crosspoint cells comprise at least one resistor, the at least one resistive memory array programmable by the plurality of current sources, and wherein the programmable at least one resistive memory array comprises setting a plurality of resistances on the plurality of resistors based applying a programmable current from the plurality of current sources and a programmable voltage from the plurality of voltage sources, wherein the at least one resistive memory array is configured to cause the apparatus to at least:
apply a current on the at least one resistive memory array, wherein the setting comprises setting a plurality of resistances on the plurality of resistors, wherein each of the plurality of resistances are based on the current;
apply at least one of a second current and a voltage on the at least one resistive memory array, wherein the setting comprises setting a second plurality of resistances on the plurality of resistors; and determine an initial unknown value, the initial value based on the applied current and voltage on the plurality of resistors.

7. The apparatus according to claim 6 , wherein the current is based on a coefficient matrix of a system of linear equations.

8. The apparatus according to claim 7 , wherein the at least one of second current and voltage is based on a known b-vector or a known x-vector of the system of linear equations.

9. The apparatus according to claim 6 , wherein the initial unknown value comprises an approximate solution to the system of linear equations.

10. A resistive memory array for solving a system of linear equations, the resistive memory array comprising:
a plurality of digital-to-analog converters, a plurality of analog-to-digital converters, a plurality of voltage sources, a plurality of current sources coupled to a plurality of crosspoint cells;
wherein the plurality of crosspoint cells each comprising at least one resistor, each one of the plurality of resistors are programmable with at least a first coefficient matrix of the system of linear equations and a known b-vector of the system of linear equations, wherein the programmable plurality of resistors comprises setting a plurality of resistances on the plurality of resistors based on the first coefficient matrix and applying at least one of a programmable current and a programmable voltage based on the known b-vector; and
at least one sensor, the at least one sensor being operatively coupled to the plurality of crosspoint cells able to sense at least one of a voltage and a current on the plurality of crosspoint cells.

11. The resistive memory array according to claim 10 , wherein the resistive memory array is able to determine an unknown value based on the first coefficient matrix and the known b-vector.

Assignees

• Friedman Eby
• Richter Isaac
• Guo Xiaochen
• Kazemi Mohammad
• Pas Kamil
• Patel Ravi
• Ipek Engin
• Liu Ji
• Univ Rochester

Inventors

• Friedman Eby
• Richter Isaac
• Guo Xiaochen
• Kazemi Mohammad
• Pas Kamil
• Patel Ravi
• Ipek Engin
• Liu Ji

Classifications

• G11C13/004 Primary

  Reading or sensing circuits or methods · CPC title

• G11C13/0002

  using resistive RAM [RRAM] elements · CPC title

• G11C13/0069

  Writing or programming circuits or methods · CPC title

• G11C7/16

  Storage of analogue signals in digital stores using an arrangement comprising analogue/digital [A/D] converters, digital memories and digital/analogue [D/A] converters · CPC title