Non-volatile memory device
US-2015213885-A1 · Jul 30, 2015 · US
US9847125B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9847125-B2 |
| Application number | US-201615229818-A |
| Country | US |
| Kind code | B2 |
| Filing date | Aug 5, 2016 |
| Priority date | Aug 5, 2015 |
| Publication date | Dec 19, 2017 |
| Grant date | Dec 19, 2017 |
A practical reading order for non-experts. Skip the full description unless you need deep technical detail.
What the patent document calls the invention.
A short plain-language summary of the technical disclosure.
Who owns or filed the patent and who is credited as inventor.
Filing, priority, publication, and grant dates set the timeline.
The legal scope of protection — read this for what is actually claimed.
Technology tags used to group this patent with similar filings.
Prior art links and similar publications in this corpus.
Official abstract text for this publication.
Presented is a method and apparatus for solving. The method includes receiving, by a resistive memory array, a first data, the resistive memory array comprising a plurality of cells, wherein the receiving comprises setting a plurality of resistances on the plurality of cells, wherein each of the plurality of resistances are based on the first data. The method further includes receiving, by the resistive memory array, a second data, wherein the receiving comprises applying at least one of a current and a voltage based on the second data on the plurality of cells. The method still further includes determining, by the resistive memory array, an initial unknown value, the initial value based on the first data and the second data.
Opening claim text (preview).
The invention claimed is: 1. A method comprising: (a) receiving, by a resistive memory array, a first data, the resistive memory array comprising a plurality of cells, wherein the receiving comprises setting a plurality of resistances on the plurality of cells, wherein each of the plurality of resistances are using the first data; (b) receiving, by the resistive memory array, a second data, wherein the receiving comprises applying at least one of a current and a voltage using the second data on the plurality of cells; and (c) determining, by the resistive memory array, an initial unknown value, the initial value based on the first data and the second data. 2. The method according to claim 1 , wherein the first data comprises a coefficient matrix of a system of linear equations. 3. The method according to claim 2 , wherein the second data is based on a known b-vector or a known x-vector of the system of linear equations. 4. The method according to claim 3 , wherein the initial unknown value comprises an approximate solution to the system of linear equations. 5. The method according to claim 1 , the method further comprising setting a plurality of resistances on the plurality of cells, wherein each of the plurality of resistances are based on the determined initial unknown value, applying at least one of a current and a voltage on the plurality of cells based on the second data, and determining a second initial unknown value based on the determined initial unknown value and the second data. 6. The method according to claim 5 , wherein the determined second initial unknown value is a closer approximate solution to the system of linear equations than the initial unknown value. 7. An apparatus for solving, the apparatus comprising: (a) at least one processor; (b) at least one memory operably connected to the at least one processor; (c) at least one resistive memory array, the resistive memory array comprising a plurality of crosspoint cells, the at least one resistive memory array programmable using at least a first data and a second data, wherein the programmable at least one resistive memory comprises setting a plurality of resistances on the plurality of crosspoint cells using the first data and applying at least one of a current and a voltage using the second data; and (d) at least one sensor, the at least one sensor being operatively coupled to the at least one resistive memory array able to sense at least one of a voltage and a current on the plurality of crosspoint cells. 8. The apparatus according to claim 7 , wherein the at least one resistive memory array is able to determine an unknown value based on the first data and the second data. 9. The apparatus according to claim 8 , wherein the first data comprises a coefficient matrix of a system of linear equations. 10. The apparatus according to claim 9 , wherein the second data comprises a known b-vector or a known x-vector of the system of linear equations. 11. The apparatus according to claim 10 , wherein the initial unknown value comprises a possible solution to the system of linear equations. 12. An apparatus for solving, the apparatus comprising: at least one processor; at least one memory including operably connected to the at least one processor; at least one resistive memory array, the resistive memory array comprising a plurality of crosspoint cells, wherein the at least one processor, the at least one memory including computer program instructions, and the at least one resistive memory array are configured to cause the apparatus to at least: set a first data on the at least one resistive memory array, wherein the setting comprises setting a plurality of resistances on the plurality of crosspoint cells, wherein each of the plurality of resistances are using the first data; set a second data on the at least one resistive memory array, wherein the setting comprises applying at least one of a current and a voltage on the plurality of crosspoint cells; and determine an initial unknown value, the initial value based on the first data and the second data. 13. The apparatus according to claim 12 , wherein the first data comprises a coefficient matrix of a system of linear equations. 14. The apparatus according to claim 12 , wherein the second data comprises a known b-vector or a known x-vector of the system of linear equations. 15. The apparatus according to claim 12 , wherein the initial unknown value comprises an approximate solution to the system of linear equations. 16. The apparatus according to claim 12 , the at least one processor, the at least one memory including computer program instructions, and the at least one resistive memory array are configured to further cause the apparatus to at least set a plurality of resistances on the plurality of cells, wherein each of the plurality of resistances are based on the determined initial unknown value, apply at least one of a current and a voltage on the plurality of cells based on the second data, and determine second initial unknown value based on the determined initial unknown value and the second data. 17. The apparatus according to claim 16 , wherein the determined second initial unknown value is a closer approximate solution to the system of linear equations than the initial unknown value.
Reading or sensing circuits or methods · CPC title
Storage of analogue signals in digital stores using an arrangement comprising analogue/digital [A/D] converters, digital memories and digital/analogue [D/A] converters · CPC title
Writing or programming circuits or methods · CPC title
using resistive RAM [RRAM] elements · CPC title
Related publications grouped by family.
Answers are generated from the same data shown on this page.