Method and apparatus for forming backside die planar devices and saw filter

Patent metadata

Field	Value
Publication number	US-10290598-B2
Application number	US-201415323521-A
Country	US
Kind code	B2
Filing date	Aug 7, 2014
Priority date	Aug 7, 2014
Publication date	May 14, 2019
Grant date	May 14, 2019

Abstract

Described is an apparatus which comprises: a backside of a first die having a redistribution layer (RDL); and one or more passive planar devices disposed on the backside, the one or more passive planar devices formed in the RDL.

First claim

We claim:

1. An apparatus comprising:
a backside of a first die having a redistribution layer (RDL);
one or more passive planar devices on the backside, the one or more passive planar devices formed in the RDL;
a front-side of the first die having an active region;
one or more vias to couple the active region with the one or more passive planar devices, wherein the one or more vias include ground and signal vias; and
a layer comprising piezoelectric material, wherein the layer is on the backside of the first die such that the layer is disposed on the RDL.

2. The apparatus of claim 1 comprises a second die coupled to the backside of the first die.

3. The apparatus of claim 2 , wherein the second die includes an active region coupled to the one or more passive planar devices of the first die.

4. The apparatus of claim 1 comprises a passivation layer on the layer.

5. The apparatus of claim 1 , wherein the one or more passive planar devices is one or more of:
a SAW filter;
a band-pass filter;
a low-pass filter;
a high-pass filter;
an inductor;
an antenna; or
a balun.

6. The apparatus of claim 1 comprises bumps on the backside of the die to couple the one or more passive planar devices to another die.

7. An apparatus comprising:
a backside of a die having a redistribution layer (RDL);
one or more SAW filters on the backside, the one or more SAW filters in the RDL;
a piezoelectric layer on the RDL over the one or more SAW filters;
a front-side of the die having an active region; and
one or more vias to couple the active region with the one or more SAW filters.

8. The apparatus of claim 7 , wherein the active region comprises a low noise amplifier (LNA) coupled to one of the one or more SAW filters.

9. The apparatus of claim 7 , wherein the active region comprises a power amplifier (PA) coupled to one of the one or more SAW filters.

10. The apparatus of claim 7 further comprises one or more passive planar devices on the backside.

11. A system comprising:
a memory;
a processor die coupled to the memory, the processor die having:
a backside with a redistribution layer (RDL);
one or more passive planar devices on the backside, the one or more passive planar devices formed in the RDL;
a front-side of the first die having an active region; and
one or more vias to couple the active region with the one or more passive planar device;
a layer comprising piezoelectric material, wherein the layer is on the backside of the first die such that the layer is on the RDL; and

a wireless interface to allow the processor to communicatively couple with another device.

12. The system of claim 11 comprises a display interface for displaying content processed by the processor.

13. The system of claim 11 , wherein the active region comprises a low noise amplifier (LNA) coupled to one of the one or more passive planar devices.

14. The system of claim 13 , wherein the one or more vias include ground and signal vias.

15. The system of claim 11 comprises another die coupled to the backside of the processor die.

Assignees

• Intel Corp

Inventors

• Lee Kevin J
• Saraswat Ruchir
• Zillmann Uwe
• Cowley Nicholas P
• Goldman Richard J

Classifications

• H10W72/29

  Bond pads specially adapted therefor · CPC title

• H10W72/922

  Bond pads being integral with underlying chip-level interconnections · CPC title

• H10W70/655

  Fan-out layouts · CPC title

• H10W70/65

  Shapes or dispositions of interconnections · CPC title

• H10W70/654

  Top-view layouts · CPC title