Semiconductor device comprising an aperture array and method of producing such a semiconductor device

Patent metadata

Field	Value
Publication number	US-10283541-B2
Application number	US-201515528089-A
Country	US
Kind code	B2
Filing date	Nov 9, 2015
Priority date	Nov 19, 2014
Publication date	May 7, 2019
Grant date	May 7, 2019

Abstract

A photosensor ( 2 ) is arranged in a semiconductor substrate ( 1 ) at a main surface ( 10 ), a dielectric layer ( 4 ) is arranged on or above the main surface, the dielectric layer including a metal layer ( 6 ) electrically connected with the photosensor, and an aperture layer ( 16 ) formed from an opaque or semitransparent material is arranged on or above the dielectric layer. The aperture layer is provided with an array of transparent aperture zones ( 18 ) above the photosensor, each of the aperture zones penetrating the aperture layer.

First claim

The invention claimed is:

1. A semiconductor device, comprising:
a semiconductor substrate with a main surface;
a photosensor at the main surface;
an aperture layer formed from an opaque or semitransparent material above the main surface;
the photosensor being arranged in the substrate;
a dielectric layer being arranged on or above the main surface, the dielectric layer including a metal layer electrically connected with the photosensor;
the aperture layer being arranged on or above the dielectric layer;
the aperture layer being provided with an array of transparent aperture zones above the photosensor, each of the aperture zones penetrating the aperture layer; and
a non-reflective cover layer on the aperture layer, the cover layer not covering the aperture zones.

2. The semiconductor device of claim 1 , wherein
each of the aperture zones has a height perpendicular to the main surface and a maximal width, the quotient of the maximal width and the height being at most 3 −0.5 .

3. The semiconductor device of claim 1 , further comprising:
a filter layer arranged above the aperture zones.

4. The semiconductor device of claim 1 , further comprising:
an integrated circuit in the substrate at the main surface.

5. A semiconductor device, comprising:
a semiconductor substrate with a main surface;
a photosensor at the main surface;
an aperture layer formed from an opaque or semitransparent material above the main surface;
the photosensor being arranged in the substrate;
a dielectric layer being arranged on or above the main surface, the dielectric layer including a metal layer electrically connected with the photosensor;
the aperture layer being arranged on or above the dielectric layer;
the aperture layer being provided with an array of transparent aperture zones above the photosensor, each of the aperture zones penetrating the aperture layer; and
a focusing element arranged between the photosensor and the aperture layer.

6. A semiconductor device, comprising:
a semiconductor substrate with a main surface;
a photosensor at the main surface;
an aperture layer formed from an opaque or semitransparent material above the main surface;
the photosensor being arranged in the substrate;
a dielectric layer being arranged on or above the main surface, the dielectric layer including a metal layer electrically connected with the photosensor;
the aperture layer being arranged on or above the dielectric layer; and
the aperture layer being provided with an array of transparent aperture zones above the photosensor, each of the aperture zones penetrating the aperture layer,
wherein each of the aperture zones comprises filling layers alternatingly formed from silicon oxide and polysilicon.

7. A semiconductor device, comprising:
a semiconductor substrate with a main surface;
a photosensor at the main surface;
an aperture layer formed from an opaque or semitransparent material above the main surface;
the photosensor being arranged in the substrate;
a dielectric layer being arranged on or above the main surface, the dielectric layer including a metal layer electrically connected with the photosensor;
the aperture layer being arranged on or above the dielectric layer;
the aperture layer being provided with an array of transparent aperture zones above the photosensor, each of the aperture zones penetrating the aperture layer; and
a further photosensor in the substrate at the main surface;
the aperture zones having an elongated shape comprising a longitudinal extension parallel to the main surface;
above the photosensor, the aperture zones being arranged to have the longitudinal extension in a first direction; and
above the further photosensor, the aperture zones being arranged to have the longitudinal extension in a second direction transverse to the first direction.

8. A semiconductor device, comprising:
a semiconductor substrate with a main surface;
a photosensor at the main surface;
an aperture layer formed from an opaque or semitransparent material above the main surface;
the photosensor being arranged in the substrate;
a dielectric layer being arranged on or above the main surface, the dielectric layer including a metal layer electrically connected with the photosensor;
the aperture layer being arranged on or above the dielectric layer;
the aperture layer being provided with an array of transparent aperture zones above the photosensor, each of the aperture zones penetrating the aperture layer;
a via hole penetrating the substrate outside the photosensor; and
a metallization layer in the via hole forming an electrical interconnection.

9. A method of producing a semiconductor device, comprising:
providing a semiconductor substrate with a photosensor at a main surface;
forming an array of aperture zones in a further semiconductor substrate;
bonding the semiconductor substrate and the further semiconductor substrate with the aperture zones facing the photosensor; and
thinning the further semiconductor substrate to an aperture layer, which is penetrated by the aperture zones.

10. The method of claim 9 , further comprising:
forming the array of aperture zones by etching recesses in a surface of the further semiconductor substrate.

11. A method of producing a semiconductor device, comprising:
providing a semiconductor substrate with a photosensor at a main surface;
bonding a further semiconductor substrate above the main surface;
thinning the further semiconductor substrate to an aperture layer; and
forming an array of aperture zones above the photosensor by etching openings in the aperture layer.

12. The method of claim 11 , further comprising:
filling the aperture zones with a dielectric material.

13. The method of claim 11 , further comprising:
filling the aperture zones with filling layers alternatingly formed from silicon oxide and polysilicon.

14. The method of claim 11 , further comprising:
arranging a filter layer above the aperture zones.

15. The method of claim 11 , further comprising:
forming the aperture zones having a height perpendicular to the main surface and a maximal width, the quotient of the maximal width and the height being at most 3 −0.5 .

16. The semiconductor device of claim 5 , wherein
each of the aperture zones has a height perpendicular to the main surface and a maximal width, the quotient of the maximal width and the height being at most 3 −0.5 .

17. The semiconductor device of claim 5 , further comprising:
a filter layer arranged above the aperture zones.

18. The semiconductor device of claim 5 , further comprising:
an integrated circuit in the substrate at the main surface.

19. The semiconductor device of claim 6 , wherein
each of the aperture zones has a height perpendicular to the main surface and a maximal width, the quotient of the maximal width and the height being at most 3 −0.5 .

20. The semiconductor device of claim 6 , further comprising:
a filter layer arranged above the aperture zones.

21. The semiconductor device of claim 6 , further comprising:
an integrated circuit in the substrate at the main surface.

22. The semiconductor device of claim 7 , wherein
each of the aperture zones has a height perpendicular to the main surface and a maximal width, the quotient of the maximal width and the height being at most 3 −0.5 .

23. The semiconductor device of claim 7 , further comprising:
a filter layer arranged above the aperture zone

Assignees

• Ams Ag

Inventors

• Siegert Joerg
• Schrank Franz
• Schrems Martin

Classifications

• H10W20/20

  Interconnections within wafers or substrates, e.g. through-silicon vias [TSV] · CPC title

• H10W20/216

  characterised by dielectric material at least partially filling the via holes, e.g. covering the through-semiconductor vias in the via holes · CPC title

• H10W20/0234

  comprising etching via holes that stop on pads or on electrodes · CPC title

• H10W20/0242

  comprising etching via holes from the back sides of the chips, wafers or substrates · CPC title

• H01L27/14636

  Electricity · mapped topic