Semiconductor device and semiconductor module
US-9697948-B2 · Jul 4, 2017 · US
US10283249B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-10283249-B2 |
| Application number | US-201615281466-A |
| Country | US |
| Kind code | B2 |
| Filing date | Sep 30, 2016 |
| Priority date | Sep 30, 2016 |
| Publication date | May 7, 2019 |
| Grant date | May 7, 2019 |
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A method for fabricating a magnetic material stack on a substrate includes the following steps. A first dielectric layer is formed. A first magnetic material layer is formed on the first dielectric layer. At least a second dielectric layer is formed on the first magnetic material layer. At least a second magnetic material layer is formed on the second dielectric layer. During one or more of the forming steps, a surface smoothing operation is performed to remove at least a portion of surface roughness on the layer being formed. The magnetic material stack can be used to form a low magnetic loss yoke inductor.
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What is claimed is: 1. A method, comprising: providing a substrate; forming a first dielectric layer on the substrate; forming a first magnetic material layer on the first dielectric layer; forming at least a second dielectric layer on the first magnetic material layer; forming at least a second magnetic material layer on the second dielectric layer, wherein, during one or more of the forming steps, a surface smoothing operation is performed to remove at least a portion of surface roughness on at least one of the first dielectric layer and the second dielectric layer; wherein the first dielectric layer, the first magnetic material layer, the second dielectric layer, and the second magnetic material layer define a magnetic material stack on the substrate, forming a hard mask on the magnetic material stack; forming a set of resist images on the hard mask; and removing portions of the hard mask and the magnetic material stack between the set of resist images to form multiple magnetic material stack sections, adjacent magnetic material stack sections being separated by a spacing therebetween. 2. The method of claim 1 , wherein the surface smoothing operation comprises a planarization process. 3. The method of claim 1 , wherein the surface smoothing operation comprises a polishing process. 4. The method of claim 1 , wherein the surface smoothing operation comprises a chemical mechanical planarization process. 5. The method of claim 1 , wherein the first and second dielectric layers serve as spacers for the first and second magnetic material layers. 6. The method of claim 1 , wherein the first and second dielectric layers are formed from a dielectric material selected from a group consisting of: silicon dioxide, silicon nitride, magnesium oxide, or combinations thereof. 7. The method of claim 1 , wherein the first and second magnetic material layers are formed from an amorphous magnetic material. 8. The method of claim 7 , wherein the amorphous magnetic material comprises a cobalt-based magnetic material. 9. The method of claim 1 , further comprising: forming one or more conductive windings around the magnetic material stack. 10. The method of claim 9 , wherein the one or more conductive windings around the magnetic material stack form a magnetic inductor structure. 11. The method of claim 1 , wherein the substrate comprises a processed wafer. 12. The method of claim 1 , wherein at least one of the first dielectric layer and the second dielectric layer is comprised of a multi-layer structure, and the multi-layer structure is comprised of a first dielectric sub layer and a second dielectric sub layer. 13. The method of claim 12 , wherein the surface smoothing operation is performed on the first dielectric sub layer, and the second dielectric sub layer is formed on the smoothed first dielectric sub layer. 14. The method of claim 1 , wherein the first dielectric layer has a first dielectric thickness and the second dielectric layer has a second dielectric thickness less than the first dielectric thickness. 15. The method of claim 1 , wherein an interlayer dielectric is filled within the spacing disposed between the adjacent magnetic multiple stack sections.
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