Illumination sensitive current control device

Patent metadata

Field	Value
Publication number	US-10276816-B2
Application number	US-201414567805-A
Country	US
Kind code	B2
Filing date	Dec 11, 2014
Priority date	Dec 11, 2014
Publication date	Apr 30, 2019
Grant date	Apr 30, 2019

Abstract

A semiconductor device that includes a layer of highly crystalline semiconductor material positioned on an insulating substrate. The semiconductor device also includes a source structure and a drain structure positioned on the layer of highly crystalline semiconductor material. The semiconductor device also includes a photoelectric element positioned on the layer of highly crystalline semiconductor material. The photoelectric element forms an electrical junction with the layer of highly crystalline semiconductor material. The photoelectric element is positioned between the source structure and the drain structure. The photoelectric element is also electrically floating.

First claim

What is claimed is:

1. A semiconductor device, the semiconductor device comprising:
a layer of crystalline semiconductor channel material disposed on an insulating substrate;
a source structure and a drain structure disposed on a top surface of the layer of crystalline semiconductor channel material;
a photoelectric element disposed between the source structure and the drain structure on the top surface of the layer of crystalline semiconductor channel material, wherein the photoelectric element forms a photosensitive field-effect junction with the layer of crystalline semiconductor channel material along an entire interface between the photoelectric element and the top surface of the layer of crystalline semiconductor channel material, wherein the photoelectric element includes a top layer of gold and a bottom layer of pentacene that forms a schottky junction with an inorganic channel material comprised of silicon, wherein the photoelectric element is electrically floating, and is not provided with an electrode for applying an external bias voltage to the photoelectric element, and wherein the source structure and the drain structure include a layer of conductive material on a layer of doped and hydrogenated silicon that is in contact with the top surface of the layer of crystalline semiconductor channel material,
wherein the source structure, the drain structure and the photoelectric element are formed in a semiconductor layer that is separate from the crystalline semiconductor channel layer, wherein the photosensitive field-effect junction formed by the photoelectric element includes photovoltaic elements that generate a voltage bias across the photosensitive field-effect junction, and wherein the photosensitive field-effect junction interfaces between an un-doped intrinsic semiconductor region that is between a p-type semiconductor and an n-type semiconductor region; and
wherein the source structure, the drain structure and the photoelectric element are separate structures with gaps between each of the source structure, the drain structure and the photoelectric element, wherein the drain structure includes layers of hydrogenated crystalline silicon that are heavily doped with phosphorus and arsenic, and wherein the hydrogenated crystalline silicon includes 5 to 40 atomic percent hydrogen.

2. The semiconductor device of claim 1 , wherein the source structure and the drain structure form ohmic contacts with the top surface of the layer of crystalline semiconductor channel material such that, upon illumination of the photoelectric element, the layer of crystalline semiconductor channel material forms an electrically conductive channel between the source structure to the drain structure and facilitates a flow of current through the layer of crystalline semiconductor channel material.

3. The semiconductor device of claim 1 , the semiconductor device further comprising: a layer of anti-reflection material covering at least a portion of the photoelectric element.

4. The semiconductor device of claim 1 , wherein the photoelectric element includes one or more hydrogenated amorphous silicon containing layers.

5. The semiconductor device of claim 4 , wherein at least one of the hydrogenated amorphous silicon containing layers has a doping type opposite to that of the crystalline semiconductor substrate.

6. The semiconductor device of claim 4 , wherein at least one of the one or more layers of hydrogenated silicon containing material has a doping type opposite to that of the crystalline semiconductor substrate.

7. The semiconductor device of claim 1 , wherein one or both of the source structure and the drain structure include one or more layers of hydrogenated silicon containing material grown by PECVD at temperatures below 400 degrees Celsius.

8. The semiconductor device of claim 1 , wherein one or both of the source structure and the drain structure include one or more layers of doped hydrogenated silicon containing material grown by PECVD at temperatures below 400 degrees Celsius.

9. The semiconductor device of claim 1 , wherein the layer of crystalline semiconductor channel material and a portion of the photoelectric element constitute one of a p-i-n structure or a p-n structure.

10. The semiconductor device of claim 1 , wherein the layer of crystalline semiconductor channel material is a doped silicon material.

11. A method of forming a semiconductor device, the method comprising:
forming a layer of crystalline semiconductor channel material disposed on an insulating substrate;
forming a source structure and a drain structure disposed on a top surface of the layer of crystalline semiconductor channel material;
forming a photoelectric element disposed between the source structure and the drain structure on the top surface of the layer of crystalline semiconductor channel material, wherein the photoelectric element forms a photosensitive field-effect junction with the layer of crystalline semiconductor channel material along an entire interface between the photoelectric element and the top surface of the layer of crystalline semiconductor channel material, wherein the photoelectric element includes a top layer of gold and a bottom layer of pentacene that forms a schottky junction with an inorganic channel material comprised of silicon, wherein the photoelectric element is electrically floating, and is not provided with an electrode for applying an external bias voltage to the photoelectric element, and wherein the source structure and the drain structure include a layer of conductive material on a layer of doped and hydrogenated silicon that is in contact with the top surface of the layer of crystalline semiconductor channel material,
wherein the source structure, the drain structure and the photoelectric element are formed in a semiconductor layer that is separate from the crystalline semiconductor channel layer, wherein the photosensitive field-effect junction formed by the photoelectric element includes photovoltaic elements that generate a voltage bias across the photosensitive field-effect junction, and wherein the photosensitive field-effect junction interfaces between an un-doped intrinsic semiconductor region that is between a p-type semiconductor and an n-type semiconductor region; and
wherein the source structure, the drain structure and the photoelectric element are separate structures with gaps between each of the source structure, the drain structure and the photoelectric element, wherein the drain structure includes layers of hydrogenated crystalline silicon that are heavily doped with phosphorus and arsenic, and wherein the hydrogenated crystalline silicon includes 5 to 40 atomic percent hydrogen.

12. The method of claim 11 , the method comprising: forming the layer of conductive material connected to a voltage source; and forming a layer of insulating substrate on the layer of conductive material.

13. The method of claim 11 , the method comprising: forming a layer of anti-reflection material on the photoelectric element.

14. The method of claim 11 , wherein the forming of the source structure and the drain structure further comprises: forming one or more ohmic contacts with the top surface of the layer of crystalline semiconductor channel material such that, upon illumination of the photoelectric element, the layer of crystalline semiconductor channel material forms an electrically conductive channel between the source structure and the drain structure and thereby facilitates a flow of current through the layer of crystalline semiconductor channel material.

Assignees

• IBM

Inventors

• De Souza Joel P
• Hekmatshoartabari Bahman
• Kuchta Daniel M
• Sadana Devendra K

Classifications

• Y02E10/547

  Monocrystalline silicon PV cells · CPC title

• H01L31/20

  Electricity · mapped topic

• H01L27/14

  Electricity · mapped topic

• H01L31/1129

  Electricity · mapped topic

• H01L51/428

  Electricity · mapped topic