BST capacitor control

Patent metadata

Field	Value
Publication number	US-10276308-B2
Application number	US-201715812438-A
Country	US
Kind code	B2
Filing date	Nov 14, 2017
Priority date	Nov 21, 2013
Publication date	Apr 30, 2019
Grant date	Apr 30, 2019

Abstract

A circuit for controlling a capacitor having a capacitance adjustable by biasing, including an amplifier for delivering a D.C. bias voltage, having a feedback slowed down by a resistive and capacitive cell.

First claim

What is claimed is:

1. A method, comprising:
applying an input voltage to a first input terminal of an amplifier, a second input terminal of the amplifier being coupled to a first resistor, a first capacitor being coupled between the first resistor and ground;
outputting, in response to applying the input voltage to the first input terminal, a bias voltage from an output terminal of the amplifier to an adjustable capacitor;
changing the bias voltage from a first voltage level to a second voltage level;
changing the bias voltage from the second voltage level to a third voltage level; and
changing a capacitance of the adjustable capacitor from a first capacitance level to a second capacitance level in a first time interval, the bias voltage changing from the second voltage level to the third voltage level in a second time interval that is approximately equal to the first time interval.

2. The method of claim 1 wherein a second resistor is coupled between the output terminal of the amplifier and the second input terminal of the amplifier.

3. The method of claim 1 wherein a second resistor is coupled between the second input terminal of the amplifier and ground.

4. The method of claim 1 wherein a second resistor is coupled to the first input terminal, a third resistor is coupled between the first input terminal and ground, and the input voltage is applied to the second resistor.

5. The method of claim 1 wherein the adjustable capacitor is a barium strontium titanium (B S T) capacitor.

6. A method, comprising:
applying an input voltage to a first input terminal of an amplifier, a second input terminal of the amplifier being coupled to a resistive and capacitive cell;
slowing, by the resistive and capacitive cell, a feedback of the amplifier;
generating, by the amplifier, a bias voltage; and
delivering, by the amplifier, the bias voltage to an adjustable capacitor.

7. The method of claim 6 wherein the resistive and capacitive cell includes a first resistor coupled to the second input terminal of the amplifier, and a first capacitor coupled to the first resistor and ground.

8. The method of claim 7 wherein a second resistor is coupled between the output terminal of the amplifier and the second input terminal of the amplifier.

9. The method of claim 6 wherein a first resistor is coupled to the first input terminal, a second resistor is coupled between the first input terminal and ground, and the input voltage is applied to the first resistor.

10. The method of claim 6 wherein the resistive and capacitive cell is sized according to a time constant of the adjustable capacitor.

11. The method of claim 6 wherein the adjustable capacitor is a barium strontium titanium (BST) capacitor.

12. A method, comprising:
applying an input voltage to a first input terminal of an amplifier, a second input terminal of the amplifier being coupled to a resistive and capacitive cell having a first time constant;
outputting, in response to applying the input voltage to the first input terminal, a bias voltage from an output terminal of the amplifier to an adjustable capacitor; and
changing a capacitance of the adjustable capacitor from a first capacitance level to a second capacitance level in a first time interval, the first time interval approximately corresponding to the first time constant.

13. The method of claim 12 wherein the resistive and capacitive cell includes a first resistor coupled to the second input terminal of the amplifier, and a first capacitor coupled to the first resistor and ground.

14. The method of claim 13 wherein a second resistor is coupled between the output terminal of the amplifier and the second input terminal of the amplifier.

15. The method of claim 12 wherein a first resistor is coupled to the first input terminal, a second resistor is coupled between the first input terminal and ground, and the input voltage is applied to the first resistor.

16. The method of claim 12 wherein the adjustable capacitor is a barium strontium titanium (BST) capacitor.

Assignees

• St Microelectronics Tours Sas

Inventors

• Charley Sylvain

Classifications

• H03H11/481

  Simulating capacitances · CPC title

• H03H11/483 Primary

  Simulating capacitance multipliers · CPC title

• H01G7/00 Primary

  Capacitors in which the capacitance is varied by non-mechanical means; Processes of their manufacture · CPC title