BST capacitor control

Patent metadata

Field	Value
Publication number	US-9847178-B2
Application number	US-201414549358-A
Country	US
Kind code	B2
Filing date	Nov 20, 2014
Priority date	Nov 21, 2013
Publication date	Dec 19, 2017
Grant date	Dec 19, 2017

Abstract

A circuit for controlling a capacitor having a capacitance adjustable by biasing, including an amplifier for delivering a D.C. bias voltage, having a feedback slowed down by a resistive and capacitive cell.

First claim

What is claimed is:

1. A device, comprising:
a first capacitor having a capacitance that is adjustable in response to a bias voltage;
a control circuit coupled to the first capacitor to control the first capacitor, the control circuit including:
an amplifier including a first input terminal, the amplifier configured to generate and deliver the bias voltage to the first capacitor to adjust, in operation, the capacitance; and
a resistive and capacitive cell, the amplifier having a feedback circuit coupled to the resistive and capacitive cell to slow down a feedback of the amplifier, the resistive and capacitive cell including a first resistor coupled to the first input terminal and a second capacitor coupled to the first resistor and ground.

2. The device of claim 1 wherein the resistive and capacitive cell is sized according to a time constant of the first capacitor.

3. The device of claim 1 wherein the amplifier includes:
an output terminal coupled to the first input terminal and the resistive and capacitive cell; and
a second input terminal that receives during operation a control voltage that depends on a value selected for the capacitance of the first capacitor.

4. The device of claim 3 wherein the control circuit includes a second resistor is positioned between the output terminal and the first input terminal of the amplifier.

5. The device of claim 1 wherein the resistive and capacitive cell includes a network of switchable capacitances.

6. The device of claim 1 wherein the control circuit includes a second resistor positioned between the first capacitor and an output terminal of the amplifier.

7. The device of claim 6 wherein the control circuit includes a third resistor positioned between the output terminal of the amplifier and the first input terminal of the amplifier.

8. The device of claim 7 wherein the control circuit includes a fourth resistor coupled between a second input terminal of the amplifier and ground and a fifth resistor is coupled between the second input terminal and a control voltage.

9. The device of claim 8 wherein the control circuit includes a sixth resistor coupled between the first input terminal and ground.

10. A control circuit, comprising:
an amplifier having a first input terminal, a second input terminal, and an output terminal;
a first resistor coupled to the second input terminal of the amplifier;
a first capacitor coupled between the first resistor and ground, the first resistor and the first capacitor configured to form a resistive-capacitive cell; and
a bias circuit configured to provide a bias voltage coupled to the first input terminal of the amplifier, the output terminal of the amplifier configured to provide, in response to the bias circuit providing the bias voltage, a control signal to an adjustable capacitor to adjust a capacitance of the adjustable capacitor, the control signal changing from a first voltage level to a second voltage level, and from the second voltage level to a third voltage level.

11. The control circuit of claim 10 , further comprising, a second resistor is positioned between the output terminal and the second input terminal of the amplifier.

12. The control circuit of claim 10 , further comprising, a second resistor is coupled between the second input terminal and ground.

13. The control circuit of claim 12 , further comprising, a third resistor is positioned between the bias voltage and the first input terminal and a fourth resistor is coupled between the first input terminal and ground.

14. The control circuit of claim 10 , wherein the adjustable capacitor is configured to change from a first capacitance level to a second capacitance level in a first time interval, and the control signal changes from the second voltage level to the third voltage level in a second time interval that is approximately equal to the first time interval.

15. A system, comprising:
a first capacitor having an adjustable capacitance, the first capacitor being configured to change from a first capacitance level to a second capacitance level in a first time interval;
an antenna coupled to the first capacitor; and
a control circuit coupled to the first capacitor, the control circuit being configured to control the first capacitor, the control circuit including:
an amplifier configured to deliver a first bias voltage to the first capacitor;
a first resistor coupled to the amplifier; and
a second capacitor coupled to the first resistor to form a resistive and capacitive cell, the resistive and capacitive cell having a time constant that approximately corresponds to the first time interval;
the amplifier having a feedback loop coupled to the resistive and capacitive cell.

16. The system of claim 15 wherein the amplifier includes:
a first terminal that receives a control voltage that depends on a value selected for the capacitance of the adjustable first capacitor;
an output terminal; and
a second terminal of the amplifier that is coupled to the output terminal and the resistive and capacitive cell, the second capacitor being coupled to ground.

17. The system of claim 15 wherein a second resistor is positioned between the output terminal and the second terminal of the amplifier.

18. The system of claim 15 wherein the first capacitor is a barium strontium titanium (BST) capacitor.

19. A device, comprising:
a first capacitor having a capacitance that is adjustable with application of a bias voltage;
a control circuit coupled to the first capacitor to control the first capacitor, the control circuit includes:
an amplifier configured to deliver the bias voltage, the amplifier including an output terminal, a first input terminal, and a second input terminal;
a resistive and capacitive cell, the amplifier having a feedback circuit coupled to the resistive and capacitive cell to slow down a feedback of the amplifier, the first input terminal of the amplifier coupled to the resistive and capacitive cell;
a first resistor coupled between the first capacitor and the output terminal of the amplifier;
a second resistor coupled between the output terminal of the amplifier and a first input terminal of the amplifier;
a third resistor coupled between the second input terminal of the amplifier and a ground;
a fourth resistor coupled between the second input terminal of the amplifier and a control voltage; and
a fifth resistor coupled between the first input terminal and the ground.

20. The device of claim 19 wherein the resistive and capacitive cell is sized according to a time constant of the first capacitor.

21. The device of claim 19 wherein the second input terminal of the amplifier receives, in operation, the control voltage, and the control voltage depends on a value selected for the capacitance of the first capacitor.

Assignees

• St Microelectronics Tours Sas

Inventors

• Charley Sylvain

Classifications

• H03H11/481

  Simulating capacitances · CPC title

• H01G7/00 Primary

  Capacitors in which the capacitance is varied by non-mechanical means; Processes of their manufacture · CPC title

• H03H11/483 Primary

  Simulating capacitance multipliers · CPC title