3D thermal detection circuits and methods

Patent metadata

Field	Value
Publication number	US-10274380-B2
Application number	US-201715460098-A
Country	US
Kind code	B2
Filing date	Mar 15, 2017
Priority date	Oct 17, 2013
Publication date	Apr 30, 2019
Grant date	Apr 30, 2019

Abstract

A three-dimensional integrated circuit includes a first layer including at least one sensing element configured to output at least one temperature-dependent voltage; and a second layer disposed vertically with respect to the first layer and coupled to the first layer by at least one via. The second layer includes: a compare circuit configured to generate at least one intermediate voltage in response to comparing the at least one temperature-dependent voltage to a feedback voltage; a control circuit configured to generate at least one control signal in response to the intermediate voltage; and a switching circuit configured to couple a capacitor coupled to a feedback node to one of a first voltage supply and a second voltage supply in response to the at least one control signal to generate an output signal that is based on a temperature sensed by the sensing element.

First claim

What is claimed is:

1. A three-dimensional integrated circuit, comprising:
a first layer including at least one sensing element configured to output at least one temperature-dependent voltage; and
a second layer disposed vertically with respect to the first layer and coupled to the first layer by at least two vias, the second layer comprising:
a compare circuit configured to generate at least one intermediate voltage in response to comparing the at least one temperature-dependent voltage to a feedback voltage, wherein the compare circuit comprises a first comparator have a first input and a second input configured to receive the feedback voltage, and a second comparator having a third input and a fourth input configured to receive the feedback voltage;
a control circuit configured to generate two control signals in response to the intermediate voltage; and
a switching circuit configured to selectively charge and discharge a capacitor using a first voltage supply and a second voltage supply, respectively, in response to the two control signals so as to generate an output signal that is based on a temperature sensed by the sensing element,

wherein the at least one sensing element comprises:
a first switch coupled to a first node disposed between a power supply node and a first resistor, the first switch configured to couple the first node to the first input of the first comparator; and
a second switch coupled to a second node disposed between the first resistor and a second resistor, the second switch configured to couple the second node to the third input of the second comparator.

2. The circuit of claim 1 , further comprising a plurality of layers disposed vertically with respect to the first layer, each of the plurality of layers includes at least one respective sensing element configured to output at least one temperature-dependent voltage.

3. The circuit of claim 1 , wherein the first and second resistors each have a resistance that is based on a temperature of the first and second resistors, respectively.

4. The circuit of claim 1 , wherein the control circuit includes a latch configured to receive a pair of intermediate voltages from the compare circuit and to output the two control signals in response.

5. The circuit of claim 4 , wherein the switching circuit comprises:
a first transistor having a source coupled to the first power supply, a drain coupled to a feedback node, and a gate configured to receive one of the two control signals output from the control circuit; and
a second transistor having a source coupled to the second power supply, a drain coupled to the feedback node, and a gate configured to receive the other of the two control signals output from the control circuit.

6. The circuit of claim 1 , wherein the capacitor is a temperature insensitive capacitor.

7. The circuit of claim 1 , wherein the first and second layers each include a respective substrate and interconnect, and wherein the at least one sensing element is disposed within the respective substrate or interconnect of the first layer.

8. A three-dimensional integrated circuit, comprising:
a first layer including a first sensing element configured to output a first temperature-dependent voltage;
a second layer including a second sensing element configured to output a second temperature-dependent voltage; and
a third layer disposed vertically with respect to the first and second layers and coupled to the first and second layers by at least two through-substrate-vias (TSVs), the third layer including:
a compare circuit configured to generate at least one intermediate voltage in response to comparing either one of the first and second temperature-dependent voltages to a feedback voltage, wherein the compare circuit comprises a first comparator have a first input and a second input configured to receive the feedback voltage and a second comparator having a third input and a fourth input configured to receive the feedback voltage;
a control circuit configured to generate two control signals in response to the intermediate voltage; and
a switching circuit configured to selectively charge and discharge a capacitor using a first voltage supply and a second voltage supply, respectively, in response to the two control signals so as to generate an output signal that is based on a temperature sensed by the sensing element,

wherein the first and second sensing elements each comprises:
a first switch coupled to a first node disposed between a power supply node and a first resistor, the first switch configured to couple the first node to the first input of the first comparator; and
a second switch coupled to a second node disposed between the first resistor and a second resistor, the second switch configured to couple the second node to the third input of the second comparator.

9. The circuit of claim 8 , wherein the first and second sensing elements each comprises at least one resistor having a resistance that is based on a temperature of the at least one resistor.

10. The circuit of claim 8 , wherein the control circuit includes a latch configured to receive a pair of intermediate voltages from the compare circuit and to output the two control signals in response.

11. The circuit of claim 10 , wherein the switching circuit comprises:
a first transistor having a first source coupled to the first voltage supply, a first drain coupled to a feedback node, and a first gate configured to receive one of the two control signals output from the control circuit; and
a second transistor having a second source coupled to the second voltage supply, a second drain coupled to the feedback node, and a second gate configured to receive the other of the two control signals output from the control circuit.

12. The circuit of claim 8 , wherein the capacitor is a temperature insensitive capacitor.

13. The circuit of claim 8 , wherein the first, second, and third layers each include a respective substrate and interconnect, and wherein the first sensing element is disposed within the respective substrate or interconnect of the first layer and the second sensing element is disposed within the respective substrate or interconnect of the second layer.

14. A method, comprising:
sensing a temperature of at least one sensing element and outputting at least one temperature-dependent voltage in response;
outputting at least one intermediate voltage based on comparing the at least one temperature-dependent voltage to a feedback voltage;
outputting two control signals in response to the at least one intermediate voltage;
selectively charging and discharging a capacitor in response to the two control signals that are based on the at least one temperature-dependent voltage; and
outputting a signal having a pulse-width that is based on the temperature of the at least one sensing element
wherein comparing the at least one temperature-dependent voltage to the feedback voltage comprises:
coupling a first node between a power supply and a first resistor to a first input of a first comparator, a second input of the first comparator being configured to receive the feedback signal; and
coupling a second node between the first resistor and a second resistor to a third input of a second comparator, a fourth input of the second comparator being configured to receive the feedback signal.

15. The method of claim 14 , wherein the at least one sensing element is disposed on a first layer of a three-dimensional integrated circuit and is coupled to other circuitry disposed on a second layer of a three-dimensional integrated circuit by a via.

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Assignees

• Taiwan Semiconductor Mfg Co Ltd

Inventors

• Liu Szu-Lin
• Horng Jaw-Juinn
• Peng Yung-Chow

Classifications

• G01K7/21 Primary

  for modifying the output characteristic, e.g. linearising · CPC title

• G01K7/20

  in a specially-adapted circuit, e.g. bridge circuit · CPC title