Substrate structure, semiconductor structure and method for fabricating the same

Patent metadata

Field	Value
Publication number	US-10273140-B2
Application number	US-201514599218-A
Country	US
Kind code	B2
Filing date	Jan 16, 2015
Priority date	Jan 16, 2015
Publication date	Apr 30, 2019
Grant date	Apr 30, 2019

Abstract

A substrate structure for a micro electro mechanical system (MEMS) device, a semiconductor structure and a method for fabricating the same are provided. In various embodiments, the substrate structure for the MEMS device includes a substrate, the MEMS device, and an anti-stiction layer. The MEMS device is over the substrate. The anti-stiction layer is on a surface of the MEMS device, and includes amorphous carbon, polytetrafluoroethene, hafnium oxide, tantalum oxide, zirconium oxide, or a combination thereof.

First claim

What is claimed is:

1. A substrate structure for a micro electro mechanical system (MEMS) device, comprising:
a first substrate;
the MEMS device over the first substrate;
a third substrate over the MEMS device;
a bond ring comprising a bond anchor extending from a top surface of the MEMS device, wherein the bond anchor and the MEMS device are etched from a same second substrate; and
an anti-stiction layer extending only from one of the top surface of the MEMS device and a bottom surface of the third substrate, wherein a top and side surfaces of the anti-stiction layer are exposed.

2. The substrate structure of claim 1 , wherein the first substrate comprises an elementary semiconductor, a compound semiconductor, an alloy semiconductor, or a combination thereof.

3. The substrate structure of claim 1 , wherein the MEMS device comprises a spring, a proof mass, an actuator, a sensor, a valve, a gear, a gyroscope, a lever, a hinge, or a combination thereof.

4. A semiconductor structure, comprising:
a first substrate;
a second substrate above the first substrate;
a MEMS device disposed in between the first substrate and the second substrate;
a bond ring comprising a bond anchor, wherein the bond anchor and the MEMS device are etched from a same third substrate and the third substrate is bonded to the second substrate;
a bump structure on a surface of the second substrate and facing toward a MEMS portion of the MEMS device; and
an anti-stiction layer extending only from a top surface of the MEMS portion of the MEMS device and directly facing the bump structure, wherein a top and side surfaces of the anti-stiction layer are exposed.

5. The semiconductor structure of claim 4 , further comprising an etch stop layer on a first portion of the first substrate.

6. The semiconductor structure of claim 4 , further comprising a bond pad over the second substrate and bonded with the bond ring.

7. The semiconductor structure of claim 6 , wherein the bond ring comprises a first metallic layer, the bond pad comprises a second metallic layer, and the first metallic layer and the second metallic layer are made of different materials.

8. The semiconductor structure of claim 7 , wherein the first metallic layer is made of germanium, and the second metallic layer is made of aluminum copper.

9. The semiconductor structure of claim 6 , wherein the bond ring comprises a first metallic layer, the bond pad comprises a second metallic layer and a third metallic layer, and the third metallic layer is sandwiched between the first metallic layer and the second metallic layer, wherein the first metallic layer and the second metallic layer are made of the same material, and the third metallic layer is made of a material different from that of the first metallic layer and the second metallic layer.

10. The semiconductor structure of claim 9 , wherein the first metallic layer and the second metallic layer are made of aluminum copper, and the third metallic layer is made of germanium.

11. The semiconductor structure of claim 4 , wherein at least one of a first portion of the first substrate and a second portion of the second substrate is a recess.

12. The semiconductor structure of claim 4 , wherein the bump structure is made of oxide, nitride, or a combination thereof.

13. The semiconductor structure of claim 4 , wherein the anti-stiction layer is on a surface of the MEMS device facing toward the second substrate, and the semiconductor structure further comprises a self-assembled monolayer coating on the second substrate.

14. The semiconductor structure of claim 4 , wherein the first substrate or the second substrate comprises an elementary semiconductor, a compound semiconductor, an alloy semiconductor, or a combination thereof.

15. The semiconductor structure of claim 4 , wherein the first substrate or the second substrate is a semiconductor on insulator (SOI).

16. The semiconductor structure of claim 4 , wherein the first substrate or the second substrate comprises a doped epi layer.

17. The semiconductor structure of claim 4 , wherein the first substrate or the second substrate comprises a multilayer compound semiconductor structure.

18. A semiconductor structure, comprising:
a micro electro mechanical system (MEMS) device;
a bond ring comprising a bond anchor protruding from a bottom surface of the MEMS device; and
an anti-stiction layer extending only from the bottom surface of the MEMS device, wherein a top and side surfaces of the anti-stiction layer are exposed.

19. The semiconductor structure of claim 18 , further comprising:
a substrate above the MEMS device and formed with a recess therein;
a metallic layer surrounding a sidewall of the bond anchor; and
an etch stop layer formed in the recess in the substrate and aligned with the anti-stiction layer.

20. The semiconductor structure of claim 18 , further comprising:
first and second substrates, between which is the MEMS device and each of which is formed with a recess therein;
an etch stop layer in the recess in the first substrate; and
a conductive layer extending from the recess in the second substrate to a surface of the second substrate outside the recess in the second substrate and bonded with the bond anchor.

Assignees

• Taiwan Semiconductor Mfg Co Ltd

Inventors

• Chang Yi-Hsien
• Wu Tzu-Heng
• Cheng Chun-Ren
• Lin Shih-Wei
• Tu Jung-Kuo

Classifications

• B81C2203/0785

  Transfer and j oin technology, i.e. forming the electronic processing unit and the micromechanical structure on separate substrates and joining the substrates · CPC title

• B81C2201/019

  Bonding or gluing multiple substrate layers · CPC title

• B81B2207/015

  the micromechanical device and the control or processing electronics being integrated on the same substrate · CPC title

• B81B3/0005 Primary

  Anti-stiction coatings · CPC title

• B81C2201/112

  Depositing an anti-stiction or passivation coating, e.g. on the elastic or moving parts · CPC title