Transparent OLED display panel

US10249698B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10249698-B2
Application numberUS-201715509198-A
CountryUS
Kind codeB2
Filing dateFeb 16, 2017
Priority dateJan 19, 2017
Publication dateApr 2, 2019
Grant dateApr 2, 2019

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

The present application provides a transparent OLED display panel. By providing the second power supply line and the first data line in the transparent region of the transparent OLED display panel in the first metal layer and the second metal layer, respectively and makes the two insulating layer arranged in a stacking manner, and the second data line and the third data line are respectively provided in the first metal layer and the second metal layer and makes the two insulating layer arranged in a stacking manner, compared to the interval arrangement in the conventional technology, the area of the traces of the transparent region of the transparent OLED display panel can be greatly reduced, the transmittance of the transparent OLED display panel is enhanced and to facilitate the development of the high resolution transparent OLED display panel.

First claim

Opening claim text (preview).

What is claimed is: 1. A transparent OLED display panel, comprising: a plurality of display pixels arranged in an array, each of the plurality of display pixels comprising a display region and a transparent region sequentially arranged in a vertical direction, each display region comprising a first, a second, and a third sub-pixels sequentially arranged in a horizontal direction; wherein a horizontal scanning line and a horizontal first power supply line electrically connected to a row of the display pixels are provided corresponding to each row of the display pixels, a vertical second power supply line electrically connected to the horizontal first power supply line is provided corresponding to each column of the display pixels, a first data line electrically connected to the first sub-pixel is provided corresponding to each column of the first sub-pixel, a second data line electrically connected to the second sub-pixel is provided corresponding to each column of the second sub-pixel, a third data line electrically connected to the third sub-pixel is provided corresponding to each column of the third sub-pixel; the horizontal first power supply line and the horizontal scanning line are located in a first metal layer, the first data line and the second data line are located in a second metal layer stacked above the first metal layer, an insulating layer is provided between the first metal layer and the second metal layer; the vertical second power supply line comprises: a first extension portion and a first bridge portion, the first extension portion is located in the first metal layer, the first bridge portion is located in the second metal layer, the first bridge portion is electrically connected to the first extension portion through a first via hole in the insulating layer, and the vertical second power supply line is insulated from and cross the horizontal scanning line by the first bridge portion; the third data line comprising a second extension portion and a second bridge portion, the second extension portion is located in the first metal layer, the second bridge portion is located in the second metal layer, the second bridge portion is electrically connected to the second extension portion through a second via hole in the insulating layer, and the third data line is insulated from and cross the horizontal first power supply line by the second bridge portion and the horizontal scanning line; and in the transparent region, the first data line is insulated and stacked to the vertical second power supply line, and the second data line is insulated and stacked to the third data line. 2. The transparent OLED display panel according to claim 1 , wherein the first, second, and third sub-pixels are red, green, and blue sub-pixels, respectively. 3. The transparent OLED display panel according to claim 1 , wherein each one of the first, second, and third sub-pixels comprises a first thin film transistor having a gate, a source, and a drain, a second thin film transistor having a gate, a source, and a drain, a capacitor having a first end and an opposite second end, and an organic light emitting diode; wherein the gate of the first thin film transistor is electrically connected to the scanning line, the source of the first thin film transistor is electrically connected to the data line corresponding to said one of the first, second, and third sub-pixels, the drain of the first thin film transistor is electrically connected to the gate of the second thin film transistor and the first end of the capacitor; the drain of the second thin film transistor is electrically connected to the horizontal first power supply line corresponding to said one of the first, second, and third sub-pixels, the source of the second thin film transistor is electrically connected to an anode of the organic light emitting diode; the anode of the organic light emitting diode is electrically connected to the second end of the capacitor, and a cathode of the organic light emitting diode is grounded. 4. The transparent OLED display panel according to claim 3 , wherein the gate of the first thin film transistor, the gate of the second thin film transistor, and the first end of the capacitor are located in the first metal layer, the source and the drain of the first thin film transistor, the source and the drain of the second thin film transistor, and the second end of the capacitor are located in the second metal layer. 5. The transparent OLED display panel according to claim 4 , wherein the insulating layer comprises a gate insulating layer and an interlayer insulating layer; and an active layer is provided on the gate insulating layer corresponding, in position, to the gate of the first thin film transistor and the gate of the second thin film transistor, and the interlayer insulating layer covers the active layer and the gate insulating layer. 6. The transparent OLED display panel according to claim 5 , wherein the source and drain of the first thin film transistor and the source and the drain of the second thin film transistor are in contact with two ends of the active layer through two third via holes, respectively. 7. The transparent OLED display panel according to claim 1 , wherein materials of the first metal layer and the second metal layer are both one of Aluminum, Molybdenum, and Titanium, or a combination thereof. 8. The transparent OLED display panel according to claim 1 , wherein a material of the insulating layer is one of Silicon Oxide and Silicon Nitride, or a combination thereof. 9. The transparent OLED display panel according to claim 1 , wherein the first data line and the vertical second power supply line are located on a left edge side of the display pixel, the second data line and the third data line are located on a right edge side of the display pixel. 10. A transparent OLED display panel, comprising: a plurality of display pixels arranged in an array, each of the plurality of display pixels comprising a display region and a transparent region sequentially arranged in a vertical direction, each display region comprising a first, a second, and a third sub-pixels sequentially arranged in a horizontal direction; wherein a horizontal scanning line and a horizontal first power supply line electrically connected to a row of the display pixels are provided corresponding to each row of the display pixels, a vertical second power supply line electrically connected to the horizontal first power supply line is provided corresponding to each column of the display pixels, a first data line electrically connected to the first sub-pixel is provided corresponding to each column of the first sub-pixel, a second data line electrically connected to the second sub-pixel is provided corresponding to each column of the second sub-pixel, a third data line electrically connected to the third sub-pixel is provided corresponding to each column of the third sub-pixel; the horizontal first power supply line and the horizontal scanning line are located in a first metal layer, the first data line and the second data line are located in a second metal layer stacked above the first metal layer, an insulating layer is provided between the first metal layer and the second metal layer; the vertical second power supply line comprises: a first extension portion and a first bridge portion, the first extension portion is located in the first metal layer, the first bridge portion is located in the second metal layer, the first bridge portion is electrically connected to the first extension portion through a first via hole in the insulating layer, and the vertical second power supply line is insulated from and cross the horizontal scanning line by the first bridge portion; the thi

Assignees

Inventors

Classifications

  • Electricity · mapped topic

  • Electricity · mapped topic

  • H10K59/12Primary

    Active-matrix OLED [AMOLED] displays · CPC title

  • H10K59/35Primary

    comprising red-green-blue [RGB] subpixels · CPC title

  • H10K59/131Primary

    Interconnections, e.g. wiring lines or terminals · CPC title

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What does patent US10249698B2 cover?
The present application provides a transparent OLED display panel. By providing the second power supply line and the first data line in the transparent region of the transparent OLED display panel in the first metal layer and the second metal layer, respectively and makes the two insulating layer arranged in a stacking manner, and the second data line and the third data line are respectively pr…
Who is the assignee on this patent?
Shenzhen China Star Optoelect
What technology area does this patent fall under?
Primary CPC classification H01L27/3276. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Apr 02 2019 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 2 related publications on this page (citations in our corpus or others sharing the same primary CPC).