Display substrate of even-distributed light emitting devices, display panel and display device
US-12069909-B2 · Aug 20, 2024 · US
US9734755B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9734755-B2 |
| Application number | US-201514800005-A |
| Country | US |
| Kind code | B2 |
| Filing date | Jul 15, 2015 |
| Priority date | Aug 20, 2014 |
| Publication date | Aug 15, 2017 |
| Grant date | Aug 15, 2017 |
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A transparent display panel includes first through (N)-th vertical constant voltage lines (N is a natural number), first through (M)-th horizontal constant voltage line groups (M is a natural number), and a plurality of transparent pixels. The transparent pixels are disposed within a grid defined by the first through (N)-th vertical constant voltage lines and the first through (M)-th horizontal constant voltage line groups. The transparent pixels operate based on constant voltages transferred through the first through (N)-th vertical constant voltage lines and the first through (M)-th horizontal constant voltage line groups. The first through (N)-th vertical constant voltage lines include first vertical constant voltage lines and second vertical constant voltage lines. Each of the first through (M)-th horizontal constant voltage line groups includes a first horizontal constant voltage line and a second horizontal constant voltage line. The constant voltages include a first constant voltage and a second constant voltage.
Opening claim text (preview).
What is claimed is: 1. A transparent display panel, comprising: first through (N)-th vertical constant voltage lines (N is a natural number); first through (M)-th horizontal constant voltage line groups (M is a natural number); and transparent pixels disposed within a grid defined by the first through (N)-th vertical constant voltage lines and the first through (M)-th horizontal constant voltage line groups, the transparent pixels configured to be operated by constant voltages transferred through the first through (N)-th vertical constant voltage lines and the first through (M)-th horizontal constant voltage line groups, wherein each of the transparent pixels comprises a transmissive window and a plurality of sub pixel circuits that are arranged in a horizontal row and vertically adjacent to the transmissive window, wherein the first through (N)-th vertical constant voltage lines comprise first vertical constant voltage lines and second vertical constant voltage lines, wherein each of the first through (M)-th horizontal constant voltage line groups comprises a first horizontal constant voltage line and a second horizontal constant voltage line, wherein the constant voltages comprise a first constant voltage and a second constant voltage, wherein the first vertical constant voltage lines are configured to receive the first constant voltage, and the first vertical constant voltage lines are electrically connected to the first horizontal constant voltage line disposed in each of the first through (M)-th horizontal constant voltage line groups, wherein the second vertical constant voltage lines are configured to receive the second constant voltage, and the second vertical constant voltage lines are electrically connected to the second horizontal constant voltage line disposed in each of the first through (M)-th horizontal constant voltage line groups, wherein each of the sub pixel circuits is electrically connected to the first horizontal constant voltage line and the second horizontal constant voltage line included in one of the first through (M)-th horizontal constant voltage line groups and receives the first constant voltage and the second constant voltage, wherein each of the first through (N)-th vertical constant voltage lines is disposed between transmissive windows in two horizontally neighboring transparent pixels, and wherein, for each of the first through (M)-th horizontal constant voltage line groups, the first horizontal constant voltage line and the second horizontal constant voltage line are disposed between two vertically neighboring transparent pixels. 2. The transparent display panel of claim 1 , wherein the first constant voltage is a supply voltage and the second constant voltage is an initialization voltage. 3. The transparent display panel of claim 2 , wherein the initialization voltage is configured to compensate a difference between threshold voltages of driving transistors disposed in the transparent pixels. 4. The transparent display panel of claim 1 , wherein the (K)-th vertical constant voltage line (K is a natural number less than N) is disposed adjacent to the (K+1)-th vertical constant voltage line, and the (K)-th vertical constant voltage line is disposed parallel to the (K+1)-th vertical constant voltage line. 5. The transparent display panel of claim 4 , wherein the first vertical constant voltage lines are odd-numbered vertical constant voltage lines among the first through (N)-th vertical constant voltage lines, and the second vertical constant voltage lines are even-numbered vertical constant voltage lines among the first through (N)-th vertical constant voltage lines. 6. The transparent display panel of claim 4 , wherein the first vertical constant voltage lines are even-numbered vertical constant voltage lines among the first through (N)-th vertical constant voltage lines, and the second vertical constant voltage lines are odd-numbered vertical constant voltage lines among the first through (N)-th vertical constant voltage lines. 7. The transparent display panel of claim 4 , wherein the first vertical constant voltage lines are (P*L)-th vertical constant voltage lines (P are natural numbers, L is a natural number less than or equal to N), and the second vertical constant voltage lines are the first through (N)-th vertical constant voltage lines except the first vertical constant voltage lines. 8. The transparent display panel of claim 4 , wherein the second vertical constant voltage lines are (P*L)-th vertical constant voltage lines (P are natural numbers, L is a natural number less than or equal to N), and the first vertical constant voltage lines are the first through (N)-th vertical constant voltage lines except the second vertical constant voltage lines. 9. The transparent display panel of claim 1 , wherein the transparent display panel further comprises data lines disposed parallel and adjacent to the first through (N)-th vertical constant voltage lines. 10. The transparent display panel of claim 9 , wherein the transparent display panel further comprises scan lines which are disposed parallel to the first through (M)-th horizontal constant voltage line groups, each scan line disposed adjacent to the first or second horizontal constant voltage line disposed in each of the first through (M)-th horizontal constant voltage line groups. 11. The transparent display panel of claim 10 , wherein the transparent pixels are configured to be operated by data signals transferred through the data lines and scan signals transferred through the scan lines. 12. The transparent display panel of claim 1 , wherein the sub pixel circuits comprise a red light emitting sub pixel circuit, a green light emitting sub pixel circuit, and a blue light emitting sub pixel circuit. 13. An organic light emitting diode (OLED) display device, comprising: a timing control circuit configured to generate a data driving unit control signal and a scan driving unit control signal based on an input image data signal; a transparent display panel; a data driving unit configured to generate data signals based on the data driving unit control signal, and provide the data signals to the transparent display panel through data lines; a scan driving unit configured to generate scan signals based on the scan driving unit control signal, and provide the scan signals to the transparent display panel through scan lines; and a power control unit configured to provide constant voltages to the transparent display panel, wherein the transparent display panel comprises: first through (N)-th vertical constant voltage lines (N is a natural number); first through (M)-th horizontal constant voltage line groups (M is a natural number); and transparent pixels disposed within a grid defined by the first through (N)-th vertical constant voltage lines and the first through (M)-th horizontal constant voltage line groups, the transparent pixels configured to be operated by constant voltages transferred through the first through (N)-th vertical constant voltage lines and the first through (M)-th horizontal constant voltage line groups, wherein each of the transparent pixels comprises a transmissive window and a plurality of sub pixel circuits that are arranged in a horizontal row and vertically adjacent to the transmissive window, wherein the first through (N)-th vertical constant voltage lines comprise first vertical constant voltage lines and second vertical constant voltage lines, wherein each of the first through (M)-th horizontal constant voltage line groups comprise a first horizontal constant voltage line and a second horizontal constant voltage line, wherein t
Generation of voltages supplied to electrode drivers in a matrix display other than LCD · CPC title
using energy recovery or conservation · CPC title
Compensation for problems related to R-C delay and attenuation in electrodes of matrix panels, e.g. in gate electrodes or on-substrate video signal electrodes · CPC title
with additional control of the display period without amending the charge stored in a pixel memory, e.g. by means of additional select electrodes · CPC title
forming a memory circuit, e.g. a dynamic memory with one capacitor · CPC title
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