Narrowed feature formation during a double patterning process

Patent metadata

Field	Value
Publication number	US-10249496-B2
Application number	US-201715587597-A
Country	US
Kind code	B2
Filing date	May 5, 2017
Priority date	May 5, 2017
Publication date	Apr 2, 2019
Grant date	Apr 2, 2019

Abstract

Interconnect structures and methods of fabricating an interconnect structure. A first mandrel line, a second mandrel line, and a non-mandrel line between the first mandrel line and the second mandrel line are provided. A first sidewall spacer is formed adjacent to a section of the first mandrel line and is arranged between the section of the first mandrel line and the non-mandrel line. A first cut is formed that extends partially across the non-mandrel line adjacent to the first spacer to narrow a section of the non-mandrel line. The section of the first mandrel line is removed selective to the first sidewall spacer to form a second cut. An interconnect is formed using the non-mandrel line. The interconnect includes a narrowed section coinciding with a location of the narrowed section of the non-mandrel line.

First claim

What is claimed is:

1. An interconnect structure comprising:
a first interconnect having a first width and a cut extending through the first interconnect across the first width; and
a second interconnect having a first section with the first width, a second section with the first width, and a third section arranged between the first section and the second section,
wherein the third section of the second interconnect has a second width that is less than the first width.

2. The interconnect structure of claim 1 wherein the third section of the second interconnect defines a fuse link of an electrical fuse.

3. The interconnect structure of claim 2 wherein the first section of the second interconnect defines a first electrode of the electrical fuse, and the first electrode is connected with the fuse link.

4. The interconnect structure of claim 1 wherein the first interconnect and the second interconnect are comprised of copper, aluminum, or cobalt.

5. The interconnect structure of claim 1 wherein the second width is less than or equal to 50 percent of the first width, and the second width is greater than or equal to 25 percent of the first width.

6. The interconnect structure of claim 1 wherein the first interconnect and the second interconnect are contained in the same plane.

7. The interconnect structure of claim 1 further comprising:
an interlayer dielectric layer in which the first interconnect and the second interconnect are embedded, and the second interconnect is spaced from the first interconnect by a line of the interlayer dielectric layer.

8. The interconnect structure of claim 3 wherein the second section of the second interconnect defines a second electrode of the electrical fuse, and the second electrode is connected with the fuse link.

9. The interconnect structure of claim 1 wherein the second width is in a range of five nanometers to ten nanometers.

10. The interconnect structure of claim 6 wherein the first interconnect and the second interconnect have equal thicknesses.

11. The interconnect structure of claim 7 wherein the third section of the second interconnect defines a notch arranged in the second interconnect between the first section of the second interconnect and the second section of the second interconnect, and the line of the interlayer dielectric layer includes a portion arranged in the notch.

Assignees

• Globalfoundries Inc

Inventors

• Shu Jiehui
• Yu Xusheng
• Zhang John H
• Zhang Xiaoqiang

Classifications

• H10W20/493

  Fuses, i.e. interconnections changeable from conductive to non-conductive · CPC title

• H10W20/491

  Antifuses, i.e. interconnections changeable from non-conductive to conductive · CPC title

• H10W20/089

  using processes for implementing desired shapes or dispositions of the openings, e.g. double patterning · CPC title

• H10P76/4085 Primary

  characterised by the processes involved to create the masks · CPC title

• H01L23/53214

  Electricity · mapped topic