Bidirectional lane routing

US10248605B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10248605-B2
Application numberUS-201515543200-A
CountryUS
Kind codeB2
Filing dateJan 28, 2015
Priority dateJan 28, 2015
Publication dateApr 2, 2019
Grant dateApr 2, 2019

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

An apparatus includes a pass-through module that includes connector pins to connect with at least one active motherboard connector and to separately connect with at least one routing motherboard connector. A routing function on the pass-through module redirects a set of bidirectional lanes from the connector pins connected to the active motherboard connector to the connector pins connected to the routing motherboard connector to enable a connection of the set of bidirectional lanes to at least one other motherboard connector via the routing motherboard connector.

First claim

Opening claim text (preview).

What is claimed is: 1. An apparatus, comprising: a pass-through module that includes connector pins to connect with at least one active motherboard connector and to separately connect with at least one routing motherboard connector; and a routing function on the pass-through module to redirect a set of bidirectional lanes from the connector pins connected to the at least one active motherboard connector to the connector pins connected to the at least one routing motherboard connector to enable a connection of the set of bidirectional lanes to at least one other motherboard connector via the at least one routing motherboard connector, wherein the pass-through module connector pins include an install pin to notify a motherboard controller that the pass-through module is installed and to enable the motherboard controller to reapportion the set of bidirectional lanes to the at least one other motherboard connector. 2. The apparatus of claim 1 , wherein the bidirectional lanes are serial input and output communications lanes of a Peripheral Component Interconnect Express (PCIe) bus. 3. The apparatus of claim 1 , wherein the at least one active connector and the at least one routing connector are configured according to the M.2 standard or the PCIe standard. 4. The apparatus of claim 1 , wherein the routing function includes an electrical trace to redirect the set of bidirectional lanes from an active motherboard connector to at least one other motherboard resource. 5. The apparatus of claim 1 , wherein the routing function includes a PCIe switch, a redriver, a clock buffer, or a retimer to drive the set of bidirectional lanes or a clock signal associated with the set of bidirectional lanes from an active motherboard connector to at least one other motherboard resource. 6. A system, comprising: a pass-through module that includes connector pins; at least one active motherboard connector to connect with a first set of the connector pins of the pass-through module; at least one routing motherboard connector to connect with a second set of the connector pins of the pass-through module; and a routing function on the pass-through module to redirect a set of bidirectional lanes from the first set of connector pins connected to the at least one active motherboard connector to the second set of connector pins connected to the at least one routing motherboard connector to enable a connection of the set of bidirectional lanes to at least one other motherboard connector via the at least one routing motherboard connector, wherein the pass-through module connector pins include an install pin to notify a motherboard controller that the pass-through module is installed and to enable the motherboard controller to reapportion the set of bidirectional lanes to the at least one other motherboard connector. 7. The system of claim 6 , wherein the bidirectional lanes are serial input and output communications lanes of a Peripheral Component Interconnect Express (PCIe) bus. 8. The system of claim 7 , wherein the at least one other motherboard connector is a Peripheral Component Interconnect Express (PCIe) connector. 9. The system of claim 6 , wherein the at least one active connector and the at least one routing connector are an M.2 connector or a PCIe connector. 10. The system of claim 6 , wherein the routing function comprises: an electrical trace to redirect a set of bidirectional lanes; and a PCIe switch, a redriver, a clock buffer, or a retimer to drive the set of bidirectional lanes or a clock signal associated with the set of bidirectional lanes from an active motherboard connector to at least one other motherboard resource. 11. The system of claim 6 , further comprising a root port to configure the first set of bidirectional lanes for the at least one active motherboard connector and to configure a second set of bidirectional lanes for the at least one other connector. 12. A system, comprising: a pass-through module that includes connector pins; at least one active M.2 motherboard connector to connect with a first set of the connector pins of the pass-through module; at least one routing M.2 motherboard connector to connect with a second set of the connector pins of the pass-through module; a Peripheral Component Interconnect Express (PCIe) motherboard connector connected to the routing connector; a routing function on the pass-through module to redirect a first set of bidirectional lanes from the first set of connector pins connected to the at least one active M.2 motherboard connector to the second set of connector pins connected to the at least one routing M.2 motherboard connector to enable a connection of the first set of bidirectional lanes to the PCIe motherboard connector via the at least one routing M.2 motherboard connector; a root port to configure the first set of bidirectional lanes for the at least one active motherboard connector and to configure a second set of bidirectional lanes for the PCIe connector; and a basic input output system (BIOS) to instruct the root port how to apportion a base set of bidirectional lanes from the root port between the first set of bidirectional lanes and the second set of bidirectional lanes, wherein the pass-through module includes an installation pin to notify the BIOS that the pass-through module is installed and to enable the BIOS to reapportion the first set of bidirectional lanes to the PCIe motherboard connector.

Assignees

Inventors

Classifications

  • G06F13/409Primary

    Mechanical coupling (back panels H05K7/1438) · CPC title

  • on a serial bus, e.g. I2C bus, SPI bus (on daisy chain buses G06F13/4247) · CPC title

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Frequently asked questions

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What does patent US10248605B2 cover?
An apparatus includes a pass-through module that includes connector pins to connect with at least one active motherboard connector and to separately connect with at least one routing motherboard connector. A routing function on the pass-through module redirects a set of bidirectional lanes from the connector pins connected to the active motherboard connector to the connector pins connected to t…
Who is the assignee on this patent?
Hewlett Packard Development Co
What technology area does this patent fall under?
Primary CPC classification G06F13/409. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Apr 02 2019 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).