Producing a semiconductor device by epitaxial growth

US10243066B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10243066-B2
Application numberUS-201715589352-A
CountryUS
Kind codeB2
Filing dateMay 8, 2017
Priority dateApr 30, 2015
Publication dateMar 26, 2019
Grant dateMar 26, 2019

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  1. Title

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  2. Abstract

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A method of producing a semiconductor device is presented. The method comprises: providing a semiconductor substrate having a surface; epitaxially growing, along a vertical direction (Z) perpendicular to the surface, a back side emitter layer on top of the surface, wherein the back side emitter layer has dopants of a first conductivity type or dopants of a second conductivity type complementary to the first conductivity type; epitaxially growing, along the vertical direction (Z), a drift layer having dopants of the first conductivity type above the back side emitter layer, wherein a dopant concentration of the back side emitter layer is higher than a dopant concentration of the drift layer; and creating, either within or on top of the drift layer, a body region having dopants of the second conductivity type, a transition between the body region and the drift layer forming a pn-junction (Zpn). Epitaxially growing the drift layer includes creating, within the drift layer, a dopant concentration profile (P) of dopants of the first conductivity type along the vertical direction (Z), the dopant concentration profile (P) in the drift layer exhibiting a variation of a concentration of dopants of the first conductivity type along the vertical direction (Z).

First claim

Opening claim text (preview).

The invention claimed is: 1. A semiconductor device including a semiconductor body having a front side and a back side, the semiconductor body extending in a vertical direction pointing from the back side to the front side and comprising: an epitaxially grown drift layer having dopants of a first conductivity type; a body region arranged either within or on top of the drift layer and having dopants of a second conductivity type complementary to the first conductivity type, a transition between the body region and the drift layer forming a pn-junction; an epitaxially grown back side emitter layer arranged in between the drift layer and the back side, the back side emitter layer having dopants of the first or the second conductivity type and having a higher dopant concentration than the drift layer; and an epitaxially grown buffer layer in contact with the drift layer, the buffer layer being arranged in between the drift layer and the back side emitter layer and having dopants of the first conductivity type at a higher dopant concentration than the drift layer, wherein a dopant concentration profile of the buffer layer along the vertical direction comprises at least one peak, and the at least one peak comprises a section having a flat doping profile. 2. The semiconductor device of claim 1 , wherein a maximum of the dopant concentration profile in the drift layer is higher than a concentration of dopants of the first conductivity type at the pn-junction by a factor of at least 2. 3. The semiconductor device of claim 1 , wherein, in the buffer layer, a dopant concentration profile along the vertical direction exhibits a variation of the dopant concentration by a factor of at least 2. 4. The semiconductor device of claim 1 , wherein, in the buffer layer, a dopant concentration profile along the vertical direction comprises at least one of a step-shaped section, a box-shaped section, a substantially linear section, and a plurality of local maxima. 5. The semiconductor device of claim 1 , wherein the body region comprises an epitaxially grown semiconductor layer. 6. The semiconductor device of claim 1 , wherein a full width at half maximum of the dopant concentration profile in the drift layer is at least 20% of the distance from the transition between the body region and the drift layer to a transition between the back side emitter layer and the drift layer. 7. The semiconductor device of claim 1 , wherein the flat doping profile is a box-shaped section or a step-shaped section. 8. A semiconductor device including a semiconductor body having a front side and a back side, the semiconductor body extending in a vertical direction pointing from the back side to the front side and comprising: an epitaxially grown drift layer having dopants of a first conductivity type; a body region arranged either within or on top of the drift layer and having dopants of a second conductivity type complementary to the first conductivity type, a transition between the body region and the drift layer forming a pn-junction; and an epitaxially grown back side emitter layer arranged in between the drift layer and the back side, the back side emitter layer having dopants of the first or the second conductivity type and having a higher dopant concentration than the drift layer; and an epitaxially grown buffer layer in contact with the drift layer, the buffer layer being arranged in between the drift layer and the back side emitter layer and having dopants of the first conductivity type at a higher dopant concentration than the drift layer, wherein a dopant concentration profile of the buffer layer along the vertical direction comprises at least one peak, and the at least one peak comprises a section having a flat doping profile. 9. The semiconductor device of claim 8 , wherein, in the buffer layer, a dopant concentration profile along the vertical direction comprises at least one of a step-shaped section, a box-shaped section, a substantially linear section, and a plurality of local maxima. 10. The semiconductor device of claim 8 , wherein the dopant concentration profile in the buffer layer exhibits at least one of a step-like increase and a step-like decrease of the dopant concentration along the vertical direction. 11. The semiconductor device of claim 8 , wherein the dopant concentration profile in the buffer layer comprises at least one box-shaped section, wherein a first lateral edge of the at least one box-shaped section comprises a step-like increase of the dopant concentration along the vertical direction, and wherein a second lateral edge of the box-shaped section comprises a step-like decrease of the dopant concentration along the vertical direction. 12. The semiconductor device of claim 11 , wherein the dopant concentration varies along the vertical direction by a factor of at least 2 over a distance of 1 μm at the at least one step-like increase and/or at the least one step-like decrease of the dopant concentration profile. 13. The semiconductor device of claim 8 , wherein the dopant concentration profile in the buffer layer comprises at least one linear section exhibiting one of a linear increase and a linear decrease of the dopant concentration along the vertical direction over a distance of at least 10% of the total extension of the buffer layer along the vertical direction. 14. The semiconductor device of claim 8 , wherein the dopant concentration profile in the buffer layer exhibits a plurality of local maxima. 15. The semiconductor device of claim 14 , wherein the dopant concentration profile in the buffer layer exhibits at least one local minimum being located between two neighboring local maxima of the plurality of local maxima, and wherein a dopant concentration at the local minimum is lower than the dopant concentration of each of the neighboring local maxima by a factor of at least 2. 16. The semiconductor device of claim 8 , wherein the epitaxially grown back side emitter layer comprises one or more island regions, the island regions having dopants of the type complementary to the dopant type of the back side emitter layer. 17. The semiconductor device of claim 8 , wherein, in the buffer layer, a dopant concentration profile along the vertical direction exhibits a variation of the dopant concentration by a factor of at least 2. 18. A semiconductor device including a semiconductor body having a front side and a back side, the semiconductor body extending in a vertical direction pointing from the back side to the front side and comprising: an epitaxially grown drift layer having dopants of a first conductivity type; a body region arranged either within or on top of the drift layer and having dopants of a second conductivity type complementary to the first conductivity type, a transition between the body region and the drift layer forming a pn-junction; an epitaxially grown back side emitter layer arranged in between the drift layer and the back side, the back side emitter layer having dopants of the first or the second conductivity type and having a higher dopant concentration than the drift layer; an epitaxially grown buffer layer in contact with the drift layer, the buffer layer being arranged in between the drift layer and the back side emitter layer and having dopants of the first conductivity type at a higher dopant concentration than the drift layer, wherein a first dopant concentration profile of the buffer layer along the vertical direction comprises at least one peak, and the at least one peak comprises a section having a flat doping profile; and wherein the epi

Assignees

Inventors

Classifications

  • using masks · CPC title

  • into semiconductor materials, e.g. for doping · CPC title

  • Doping during depositing · CPC title

  • of conductive or resistive materials · CPC title

  • using chemical vapour deposition [CVD] · CPC title

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What does patent US10243066B2 cover?
A method of producing a semiconductor device is presented. The method comprises: providing a semiconductor substrate having a surface; epitaxially growing, along a vertical direction (Z) perpendicular to the surface, a back side emitter layer on top of the surface, wherein the back side emitter layer has dopants of a first conductivity type or dopants of a second conductivity type complementary…
Who is the assignee on this patent?
Infineon Technologies Austria Ag
What technology area does this patent fall under?
Primary CPC classification H01L29/7395. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Mar 26 2019 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).