Sensor chip stack and method of producing a sensor chip stack

US10243017B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10243017-B2
Application numberUS-201715636545-A
CountryUS
Kind codeB2
Filing dateJun 28, 2017
Priority dateJul 4, 2016
Publication dateMar 26, 2019
Grant dateMar 26, 2019

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

The sensor chip stack comprises a sensor substrate of a semiconductor material including a sensor, a chip fastened to the sensor substrate, the chip including an integrated circuit, electric interconnections between the sensor substrate and the chip, electric terminals of the chip, the chip being arranged between the electric terminals and the sensor substrate, and a molding material arranged adjacent to the chip, the electric terminals of the chip being free from the molding material.

First claim

Opening claim text (preview).

The invention claimed is: 1. A sensor chip stack, comprising: a sensor substrate of a semiconductor material including a sensor or plurality of sensors; bond pads of the sensor substrate; a chip fastened to the sensor substrate, the chip including an integrated circuit; contact pads of the chip, the contact pads facing the bond pads; pad connections including via bumps between the sensor substrate and the chip, each of the pad connections electrically connecting one of the bond pads and one of the contact pads; electric terminals of the chip, the chip being arranged between the electric terminals and the sensor substrate; a molding material arranged adjacent to the chip, the electric terminals of the chip being free from the molding material; a sidewall metallization inside an opening of the molding material, the sidewall metallization electrically connecting one of the electric terminals of the chip with a contact pad of the sensor substrate; a contact layer of the chip, the contact layer being arranged between the sensor substrate and the chip; and a through-chip metallization penetrating the chip, the through-chip metallization contacting the contact layer and being electrically connected to one of the electric terminals. 2. The sensor chip stack according to claim 1 , further comprising: a further chip fastened to the sensor substrate, the further chip including a further integrated circuit; further electric terminals of the further chip, the further chip being arranged between the further electric terminals and the sensor substrate; and the molding material being arranged adjacent to the further chip, the further electric terminals being free from the molding material. 3. The sensor chip stack according to claim 1 , further comprising: a further chip fastened to the sensor substrate, the further chip including a further integrated circuit; further electric terminals of the further chip, the further chip being arranged between the further electric terminals and the sensor substrate; further contact pads of the further chip, the further contact pads facing the bond pads; the electric interconnections comprising further pad connections, each of the further pad connections electrically connecting one of the bond pads and one of the further contact pads; and the molding material being arranged adjacent to the further chip, the further electric terminals being free from the molding material. 4. The sensor chip stack according to claim 2 or 3 , wherein the sidewall metallization penetrates the molding material between the chip and the further chip and contacting the contact pad. 5. The sensor chip stack according to claim 1 , further comprising: an underfill material between the sensor substrate and the chip.

Assignees

Inventors

Classifications

  • Package configurations · CPC title

  • for generating image signals from two or more image sensors being of different type or operating in different modes, e.g. with a CMOS sensor for moving images in combination with a charge-coupled device [CCD] for still images · CPC title

  • Electricity · mapped topic

  • Electricity · mapped topic

  • Electricity · mapped topic

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Frequently asked questions

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What does patent US10243017B2 cover?
The sensor chip stack comprises a sensor substrate of a semiconductor material including a sensor, a chip fastened to the sensor substrate, the chip including an integrated circuit, electric interconnections between the sensor substrate and the chip, electric terminals of the chip, the chip being arranged between the electric terminals and the sensor substrate, and a molding material arranged a…
Who is the assignee on this patent?
Ams Int Ag
What technology area does this patent fall under?
Primary CPC classification H01L27/14636. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Mar 26 2019 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 3 related publications on this page (citations in our corpus or others sharing the same primary CPC).