Image sensor chip sidewall interconnection
US-2017221952-A1 · Aug 3, 2017 · US
US10243017B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-10243017-B2 |
| Application number | US-201715636545-A |
| Country | US |
| Kind code | B2 |
| Filing date | Jun 28, 2017 |
| Priority date | Jul 4, 2016 |
| Publication date | Mar 26, 2019 |
| Grant date | Mar 26, 2019 |
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The sensor chip stack comprises a sensor substrate of a semiconductor material including a sensor, a chip fastened to the sensor substrate, the chip including an integrated circuit, electric interconnections between the sensor substrate and the chip, electric terminals of the chip, the chip being arranged between the electric terminals and the sensor substrate, and a molding material arranged adjacent to the chip, the electric terminals of the chip being free from the molding material.
Opening claim text (preview).
The invention claimed is: 1. A sensor chip stack, comprising: a sensor substrate of a semiconductor material including a sensor or plurality of sensors; bond pads of the sensor substrate; a chip fastened to the sensor substrate, the chip including an integrated circuit; contact pads of the chip, the contact pads facing the bond pads; pad connections including via bumps between the sensor substrate and the chip, each of the pad connections electrically connecting one of the bond pads and one of the contact pads; electric terminals of the chip, the chip being arranged between the electric terminals and the sensor substrate; a molding material arranged adjacent to the chip, the electric terminals of the chip being free from the molding material; a sidewall metallization inside an opening of the molding material, the sidewall metallization electrically connecting one of the electric terminals of the chip with a contact pad of the sensor substrate; a contact layer of the chip, the contact layer being arranged between the sensor substrate and the chip; and a through-chip metallization penetrating the chip, the through-chip metallization contacting the contact layer and being electrically connected to one of the electric terminals. 2. The sensor chip stack according to claim 1 , further comprising: a further chip fastened to the sensor substrate, the further chip including a further integrated circuit; further electric terminals of the further chip, the further chip being arranged between the further electric terminals and the sensor substrate; and the molding material being arranged adjacent to the further chip, the further electric terminals being free from the molding material. 3. The sensor chip stack according to claim 1 , further comprising: a further chip fastened to the sensor substrate, the further chip including a further integrated circuit; further electric terminals of the further chip, the further chip being arranged between the further electric terminals and the sensor substrate; further contact pads of the further chip, the further contact pads facing the bond pads; the electric interconnections comprising further pad connections, each of the further pad connections electrically connecting one of the bond pads and one of the further contact pads; and the molding material being arranged adjacent to the further chip, the further electric terminals being free from the molding material. 4. The sensor chip stack according to claim 2 or 3 , wherein the sidewall metallization penetrates the molding material between the chip and the further chip and contacting the contact pad. 5. The sensor chip stack according to claim 1 , further comprising: an underfill material between the sensor substrate and the chip.
Package configurations · CPC title
for generating image signals from two or more image sensors being of different type or operating in different modes, e.g. with a CMOS sensor for moving images in combination with a charge-coupled device [CCD] for still images · CPC title
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
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