Method of wet etching and method of fabricating semiconductor device using the same

US10242880B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10242880-B2
Application numberUS-201715645419-A
CountryUS
Kind codeB2
Filing dateJul 10, 2017
Priority dateOct 7, 2016
Publication dateMar 26, 2019
Grant dateMar 26, 2019

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

Disclosed are a method of wet etching and a method of fabricating a semiconductor device. The wet etching method includes providing a wafer in a process bath and an etchant is accommodated, supplying the process bath with a primary etchant to control a concentration of a specific material in the etchant, supplying the process bath with a first additive to increase the concentration of the specific material in the etchant, and supplying the process bath with a second additive to suppress a defect caused by an increase in the concentration of the specific material in the etchant. The etchant includes at least one, of the primary etchant, the first additive, and the second additive. The first additive and the second additive are separately supplied to the process bath.

First claim

Opening claim text (preview).

What is claimed is: 1. A method of wet etching, comprising: providing a wafer in a process bath, the process bath accommodating therein an etchant; supplying the process bath with a primary etchant to control a concentration of a specific material in the etchant; supplying the process bath with a first additive to increase the concentration of the specific material in the etchant; and supplying the process bath with a second additive to suppress a defect caused by an increase in the concentration of the specific material in the etchant, wherein the etchant comprises at least one of the primary etchant, the first additive, and the second additive, wherein the first additive and the second additive are separately supplied to the process bath, and wherein the second additive comprises an ammonium compound. 2. The method of claim 1 , wherein the primary etchant comprises a material different from that contained in each of the first additive and the second additive. 3. The method of claim 1 , wherein the first additive comprises a silicon compound, and the concentration of the specific material in the etchant is a silicon concentration in the etchant. 4. The method of claim 3 , wherein increasing the concentration of the specific material in the etchant comprises increasing the silicon concentration in the etchant so as to have a predetermined value. 5. The method of claim 1 , wherein the concentration of the specific material in the etchant is a silicon concentration in the etchant, and the second additive is supplied to the process bath at a time when the silicon concentration in the etchant has a certain value. 6. The method of claim 1 , wherein the concentration of the specific material in the etchant during the etching process is based on supply amounts of the primary etchant and the first additive supplied to the process bath. 7. The method of claim 1 , wherein the second additive is supplied to the process bath after an etching process is performed on the wafer and before an additional wafer is provided to the process bath. 8. A method of fabricating a semiconductor device, comprising: forming a thin-layer structure including oxide layers and nitride layers alternately and repeatedly stacked on a substrate; forming a trench penetrating the thin-layer structure; and removing the nitride layers exposed through the trench, wherein removing the nitride layers comprises: providing the substrate in a process bath where an etching process is performed to remove the nitride layers, the process bath accommodating therein an etchant; supplying the process bath with a first additive to increase a concentration of a specific material in the etchant; and supplying the process bath with a second additive to suppress a defect caused by an increase in the concentration of the specific material in the etchant, wherein the first additive and the second additive are separately supplied to the process bath. 9. The method of claim 8 , wherein the first additive and the second additive comprise different materials from each other. 10. The method of claim 9 , wherein the first additive comprises a silicon compound, and wherein increasing the concentration of the specific material in the etchant comprises increasing a silicon concentration in the etchant so as to have a predetermined value. 11. The method of claim 9 , wherein the concentration of the specific material in the etchant is a silicon concentration in the etchant, and the second additive is supplied to the process bath at a time when the silicon concentration in the etchant has a certain value. 12. The method of claim 9 , wherein the second additive is supplied to the process bath after the etching process is performed on the substrate and before an additional wafer is provided to the process bath. 13. The method of claim 8 , wherein the nitride layers are silicon nitride layers, the etchant comprises phosphoric acid, and each of the first additive and the second additive comprises a material different from phosphoric acid. 14. A method, comprising: etching a substrate in a process bath during consecutive first and second non-overlapping time intervals using a primary etchant and a first additive, the first time interval including a commencement of the etching and the second time interval including a termination of the etching; determining a concentration of a specific material in the process bath responsive to etching the substrate; adjusting a supply amount of the primary etchant and the first additive in the process bath based on the concentration of the specific material such that the concentration of the specific material is below a threshold that facilitates oxide growth; and supplying a second additive to the process bath that suppresses the oxide growth during both the first and second time intervals or during only the second time interval. 15. The method of claim 14 , wherein the substrate has a plurality of oxide layers and nitride layers alternately stacked thereon and a semiconductor pattern that extends through the plurality of oxide layers and nitride layers; and wherein adjusting the supply amount of the primary etchant and the first additive comprises adjusting the supply amount of the primary etchant and the first additive so as to remove at least portions of the nitride layers and to configure sidewall profiles of the oxide layers, respectively. 16. The method of claim 15 , wherein adjusting the supply amount of the primary etchant and the first additive in the process bath comprises adjusting the supply amount of the primary etchant and the first additive in the process bath such that the concentration of the specific material is one of substantially constant, increased, and decreased. 17. The method of claim 16 , wherein a distance between sidewalls of adjacent oxide layers is greater nearer the semiconductor pattern than farther away from the semiconductor pattern when the concentration of the specific material is decreased; and wherein the distance between sidewalls of adjacent oxide layers is greater farther away from the semiconductor pattern than nearer the semiconductor pattern when the concentration of the specific material is increased.

Assignees

Inventors

Classifications

  • with the semiconductor substrates being dipped in baths or vessels · CPC title

  • H10P50/283Primary

    by chemical means · CPC title

  • of inorganic materials · CPC title

  • the material being a silicon nitride not containing oxygen, e.g. SixNy or SixByNz · CPC title

  • H10P50/642Primary

    Chemical etching · CPC title

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What does patent US10242880B2 cover?
Disclosed are a method of wet etching and a method of fabricating a semiconductor device. The wet etching method includes providing a wafer in a process bath and an etchant is accommodated, supplying the process bath with a primary etchant to control a concentration of a specific material in the etchant, supplying the process bath with a first additive to increase the concentration of the speci…
Who is the assignee on this patent?
Kim Kwangsu, Cha Se Ho, Ko Yongsun, and 8 more
What technology area does this patent fall under?
Primary CPC classification H10P50/283. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Mar 26 2019 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 2 related publications on this page (citations in our corpus or others sharing the same primary CPC).