Clean resistant windows for ultraviolet thermal processing

Patent metadata

Field	Value
Publication number	US-10240236-B2
Application number	US-201514641179-A
Country	US
Kind code	B2
Filing date	Mar 6, 2015
Priority date	Mar 6, 2015
Publication date	Mar 26, 2019
Grant date	Mar 26, 2019

Abstract

Apparatuses and methods for cleaning a semiconductor processing chamber is provided. The semiconductor processing chamber may include a UV radiation source, a substrate holder, and a UV transmissive window. The UV transmissive window may include one or multiple panes. One or more panes of the UV transmissive window may be non-reactive with fluorine containing chemistries. In multi-pane windows a purge gas flow path may be formed in the gap between windows. A purge gas may be flowed through the purge gas flow path to prevent process gases used in the chamber interior from reaching one or more panes of the UV transmissive window.

First claim

What is claimed is:

1. A semiconductor processing apparatus, comprising:
a substrate processing chamber having chamber walls defining a chamber interior, the chamber walls comprising a UV transmissive window, wherein:
the UV transmissive window is a dual pane window that comprises an interior pane exposed to the chamber interior and an exterior pane exposed to an exterior of the substrate processing chamber,
the interior pane is comprised of a first material that is non-reactive with fluorine-containing chemistries, and
the exterior pane is comprised of a second material that is reactive with fluorine-containing chemistries;

a substrate holder disposed inside the chamber interior;
a UV source disposed outside the chamber interior to shine UV radiation into the chamber interior through the UV transmissive window; and
a purge gas flow path that is between the interior pane and the exterior pane of the UV transmissive window and that includes an inlet and an outlet, wherein the interior pane is offset from the exterior pane in a first direction, wherein the inlet is positioned radially outward of the interior pane and is radially interposed between the interior pane and the outlet, and wherein the outlet is positioned radially outward of the inlet.

2. The semiconductor processing apparatus of claim 1 , wherein the first material is sapphire.

3. The semiconductor processing apparatus of claim 1 , further comprising a purge gas source for delivery of purge gas to the purge gas flow path.

4. The semiconductor processing apparatus of claim 1 , wherein the interior pane is mounted in the UV transmissive window such that substantially no stress is imparted to the interior pane by the mounting.

5. The semiconductor processing apparatus of claim 4 , further comprising a support piece that supports the interior pane.

6. The semiconductor processing apparatus of claim 5 , wherein the support piece is ring-shaped.

7. The semiconductor processing apparatus of claim 5 , wherein the support piece is configured to allow the interior pane to move on the support piece.

8. The semiconductor processing apparatus of claim 5 , further comprising holding features, wherein the holding features are positioned on the interior pane and configured to prevent the interior pane from separating from the support piece.

9. The semiconductor processing apparatus of claim 1 , wherein:
the interior pane has a first diameter, and
the exterior pane has a second diameter that is larger than the first diameter.

10. The semiconductor processing apparatus of claim 1 , wherein:
the interior pane has a first thickness, and
the exterior pane has a second thickness that is larger than the first thickness.

11. The semiconductor processing apparatus of claim 1 , wherein the second material is quartz.

12. The semiconductor processing apparatus of claim 1 , wherein the first material is sapphire and the second material is quartz.

13. The semiconductor processing apparatus of claim 1 , wherein the purge gas flow path between the two window panes is maintained at substantially the same pressure as the chamber interior.

14. A semiconductor processing system comprising:
one or more substrate processing apparatuses, each substrate processing apparatus including a substrate processing chamber, wherein each substrate processing chamber includes:
chamber walls defining a chamber interior, the chamber walls comprising a UV transmissive window, wherein:
the UV transmissive window is a dual pane window that comprises an interior pane exposed to the chamber interior and an exterior pane exposed to an exterior of the substrate processing chamber,
the interior pane is comprised of a first material that is non-reactive with fluorine containing chemistries, and
the exterior pane is comprised of a second material that is reactive with fluorine-containing chemistries;

a substrate holder disposed inside the chamber interior, and
a UV source disposed outside the chamber interior to shine UV radiation into the substrate processing chamber through the UV transmissive window;
a purge gas flow path that is between the interior pane and the exterior pane of the UV transmissive window and that includes an inlet and an outlet, wherein the interior pane is offset from the exterior pane in a first direction, wherein the inlet is positioned radially outward of the interior pane and is radially interposed between the interior pane and the outlet, and wherein the outlet is positioned radially outward of the inlet; and

a controller for operating the one or more substrate processing apparatuses, the controller comprising instructions to:
flow a purge gas into the purge gas flow path, and
flow a first process gas into the chamber interior.

15. The semiconductor processing system of claim 14 , wherein the controller further comprises instructions to flow the purge gas and the first process gas at the same time.

16. The semiconductor processing system of claim 15 , wherein the controller further comprises instructions to maintain the pressure of the purge gas flow path and the chamber interior at substantially the same pressure.

17. The semiconductor processing system of claim 14 , wherein the controller further comprises instructions to:
flow a second process gas into the purge gas flow path, wherein the second process gas includes oxygen; and
emit UV radiation from the UV source into the purge gas flow path to convert at least some of the oxygen of the second process gas flowed into the purge gas flow path into ozone.

18. The semiconductor processing system of claim 14 , wherein the first process gas includes fluorine containing compounds.

19. The semiconductor processing system of claim 14 , further comprising two or more substrate processing apparatuses.

20. The semiconductor processing system of claim 19 , further comprising four substrate processing apparatuses.

Assignees

• Lam Res Corp

Inventors

• Lee James
• Antonelli George Andrew
• Mclaughlin Kevin M
• Mckerrow Andrew John
• Bailey Curtis
• Fox Alexander R
• Lau Stephen
• Smargiassi Eugene
• Holder Casey
• Ribaudo Troy Daniel
• Chen Xiaolan

Classifications

• H10P72/7621

  characterised by supporting two or more semiconductor substrates · CPC title

• H10P72/7618

  characterised by a movable susceptor, stage or support, others than those only rotating on their own vertical axis, e.g. susceptors on a rotating carrousel · CPC title

• H10P72/0462

  characterised by the construction of the processing chambers, e.g. modular processing chambers · CPC title

• H10P72/0436

  mainly by radiation · CPC title

• B08B9/00

  Cleaning hollow articles by methods or apparatus specially adapted thereto · CPC title