Current detection method of semiconductor device and semiconductor device

Patent metadata

Field	Value
Publication number	US-10222403-B2
Application number	US-201715823217-A
Country	US
Kind code	B2
Filing date	Nov 27, 2017
Priority date	Apr 14, 2015
Publication date	Mar 5, 2019
Grant date	Mar 5, 2019

Abstract

A control method of a semiconductor device includes inspecting an electrical property of a current detection circuit in the first semiconductor chip, writing information on a correction equation obtained on the basis of an inspection result in a memory circuit of the second semiconductor chip, and correcting, with the second semiconductor chip, a detection result obtained by the current detection circuit on the basis of the information on the correction equation.

First claim

What is claimed is:

1. A control method of a semiconductor device comprising a first semiconductor chip and a second semiconductor chip which are mounted in one package, and a load driving terminal, the first semiconductor chip including an electric power supply transistor operable to supply power to a load via the load driving terminal and a current detection circuit operable to detect a current flowing through the load driving terminal, and the second semiconductor chip including a memory circuit, the method comprising;
in an inspection process of the semiconductor device:
inspecting an electrical property of the current detection circuit in the first semiconductor chip;
writing information on a correction equation obtained on the basis of an inspection result in the memory circuit of the second semiconductor chip; and
correcting, with the second semiconductor chip, a detection result obtained by the current detection circuit on the basis of the information on the correction equation;

wherein the second semiconductor chip directs the first semiconductor chip for the detection result obtained by the current detection circuit which is corrected to be closer to a prescribed current.

2. A control method of a semiconductor device according to claim 1 , wherein the electric power supply transistor of the second semiconductor chip is operable to supply power to a motor via the load driving terminal, and
wherein the second semiconductor chip calculates a PWM (Pulse Width Modulation) duty for bringing the detection result obtained by the current detection circuit which is corrected to be closer to the prescribed current, and directs the PWM duty to the first semiconductor chip.

3. A semiconductor device comprising:
a first semiconductor chip;
a second semiconductor chip, the first semiconductor chip and the second semiconductor chip being mounted in one package; and
a load driving terminal,
wherein the first semiconductor chip comprises:
an electric power supply transistor operable to supply power to a load via the load driving terminal;
a driver circuit operable to drive the electric power supply transistor;
a first terminal; and
a current detection resistor operable to detect a current flowing through the load driving terminal and to output a voltage reflecting the current concerned to the first terminal,

wherein the second semiconductor chip comprises:
a second terminal to be coupled to the first terminal;
an analog-to-digital converter circuit operable to convert an analog signal inputted to the second terminal into a digital signal;
a memory circuit operable to hold information on a correction equation obtained in an inspection process of the semiconductor device; and
an arithmetic processing circuit operable to calculate a current value of a current flowing through the load driving terminal by correcting the digital signal with the use of the correction equation, and

wherein the second semiconductor chip controls the first semiconductor chip for the current value of a current flowing through the load driving terminal by correcting the digital signal to be closer to a predetermined current.

4. A semiconductor device according to claim 3 , wherein the electric power supply transistor of the second semiconductor chip is operable to supply power to a motor via the load driving terminal, and
wherein the second semiconductor chip calculates a PWM (Pulse Width Modulation) duty for bringing the detection result obtained by the current detection circuit which is corrected to be closer to the predetermined current, and controls the PWM duty to the first semiconductor chip.

5. A method of detecting current in a semiconductor device including a first and second semiconductor chips mounted in one package, the first semiconductor chip supplying power to a load and including a current detection circuit for detecting a current flowing through the load, the method comprising:
in the first semiconductor chip, inspecting an electrical property of the current detection circuit; and
in the second semiconductor chip:
obtaining information on a correction equation on the basis of an inspection result from the inspecting of the electrical property; and
correcting a detection result obtained by the current detection circuit on the basis of the obtained information on the correction equation.

6. The method of claim 5 , wherein the inspecting of the electrical property is performed in an inspection process of the semiconductor device.

7. The method of claim 5 , wherein the semiconductor device further comprises a load driving terminal, the first semiconductor chip comprises an electric power supply transistor for supplying power to the load via the load driving terminal, and the current detection circuit detects a current flowing through the load by detecting a current flowing through the load driving terminal.

8. The method of claim 7 , wherein the second semiconductor chip comprises a memory circuit, and the information on the correction equation is written in the memory circuit.

9. The method of claim 8 , wherein the first semiconductor chip further comprises a first terminal,
wherein the current detection circuit comprises a current detection resistor operable to output a voltage reflecting the current flowing through the load driving terminal to the first terminal, and
wherein the second semiconductor chip further comprises:
a second terminal to be coupled to the first terminal;
an analog-to-digital converter circuit operable to convert an analog signal inputted to the second terminal into a digital signal; and
an arithmetic processing circuit operable to process the digital signal.

10. The method of claim 9 , wherein the inspection process of the semiconductor device comprises:
a first process of applying a first current to the load driving terminal and measuring a first voltage outputted to the first terminal;
a second process of applying a second current with a different current value from the first current to the load driving terminal and measuring a second voltage outputted to the first terminal;
a third process of defining the information on the correction equation on the basis of the relation between the difference of the first current and the second current and the difference of the first voltage and the second voltage; and
a fourth process of writing the information on the correction equation to the memory circuit, and
wherein the arithmetic processing circuit calculates the current value of the current flowing through the load driving terminal, by correcting the digital signal with the use of the correction equation.

11. The method of claim 10 , wherein the correction equation is a linear function, and
wherein the information on the correction equation is a coefficient of the linear function.

12. The method of claim 10 , wherein one of the first semiconductor chip and the second semiconductor chip further comprises a temperature sensor circuit operable to output a temperature monitor signal with a value indicative of temperature,
wherein the inspection process of the semiconductor device further comprises:
a fifth process of executing the first process, the second process, and the third process, in the state where the semiconductor device is placed under the environment of a first temperature, to further measure the temperature monitor signal;
a sixth process of executing the first process, the second process, and the third process, in the state where the semiconductor device is placed under the environment of a second temperature different from the first temperature, to further measure the temperature monitor signal;
a seventh proce

Assignees

• Renesas Electronics Corp

Inventors

• Soma Osamu
• Uemura Akira
• Amada Kenji

Classifications

• G01R15/09

  Autoranging circuits · CPC title

• G01R19/32 Primary

  Compensating for temperature change · CPC title

• G01R1/203

  Resistors used for electric measuring, e.g. decade resistors standards, resistors for comparators, series resistors, shunts (resistors in general H01C; microwave or radiowave terminations H01P1/26; coupling devices H01R) · CPC title