IGBT having improved clamp arrangement

Patent metadata

Field	Value
Publication number	US-10218349-B2
Application number	US-201715641877-A
Country	US
Kind code	B2
Filing date	Jul 5, 2017
Priority date	May 17, 2016
Publication date	Feb 26, 2019
Grant date	Feb 26, 2019

Abstract

In one embodiment, an insulated gate bipolar transistor (IGBT) device may include an NMOS portion and a PNP portion, where the PNP portion is coupled to the NMOS portion. The PNP portion may include a base and a collector. The IGBT may further include a flyback clamp, where the flyback clamp is coupled between the base and the collector of the PNP portion.

First claim

What is claimed is:

1. An insulated gate bipolar transistor (IGBT) device, comprising:
an NMOS portion;
a PNP portion, coupled to the NMOS portion, wherein the PNP portion comprising a base and a collector; and
a flyback clamp, coupled between the base and the collector of the PNP portion, wherein the flyback clamp comprises a diode stack, wherein the diode stack includes pair of diodes, arranged in a cathode-to-cathode configuration.

2. The IGBT device of claim 1 , wherein the pair of diodes comprise polysilicon diodes.

3. The IGBT device of claim 1 , further comprising a base-emitter resistor, coupled between the base and an emitter of the PNP portion.

4. The IGBT device of claim 3 , wherein the IGBT device comprises a semiconductor substrate, wherein the base-emitter resistor is an integrated base-emitter resistor, the integrated base-emitter resistor being integrated into the semiconductor substrate.

5. The IGBT device of claim 1 , further comprising an RG resistor, the RG resistor being connected to the gate of the NMOS portion.

6. The IGBT device of claim 1 , wherein the flyback clamp is disposed to maintain the NMOS portion in an OFF state during an inductive flyback period of operation of the IGBT.

7. The IGBT device of claim 6 , wherein the flyback clamp is disposed to turn on the PNP portion during the inductive flyback period.

8. The IGBT device of claim 1 , wherein the flyback clamp is configured to carry at least a majority of a base current flowing through the PNP portion.

9. Thu IGBT device of claim 1 , further comprising an epitaxial layer contact ring, wherein the IGBT device is configured to redirect at least a portion of a base current of the PNP portion through the epitaxial layer contact ring.

10. A method of operating an insulated gate bipolar transistor (IGBT), comprising:
switching the IGBT from an ON state to an OFF state; and
turning on a PNP portion of the IGBT in the OFF state, wherein an NMOS portion of the IGBT, coupled to the PNP portion, is maintained in an OFF condition during flyback clamping in the OFF state, wherein the PNP portion is turned on by a flyback clamp arranged between a base and a collector of the PNP portion, wherein the flyback clamp comprises a diode stack, wherein the diode stack includes pair of diodes, arranged in a cathode-to-cathode configuration.

11. The method of claim 10 , wherein the pair of diodes comprise polysilicon diodes.

12. The method of claim 10 , further comprising providing a base-emitter resistor between a base and an emitter of the PNP portion, wherein beta-multiplied current is reduced into a collector of the PNP portion as compared to a configuration of the IGBT lacking the base-emitter resistor.

13. The method of claim 10 , further comprising redirecting base current in the PNP portion of the IGBT during the flyback clamping through an epitaxial layer contact ring, wherein at least one of current crowding and power dissipation is reduced in a core of the IGBT.

Assignees

• Littelfuse Inc

Inventors

• Yerger Justin Michael

Classifications

• H03K17/567

  Circuits characterised by the use of more than one type of semiconductor device, e.g. BIMOS, composite devices such as IGBT · CPC title

• H03K2217/0036

  Means reducing energy consumption · CPC title

• H03K5/08 Primary

  by limiting; by thresholding; by slicing, i.e. combined limiting and thresholding (H03K5/07 takes precedence; comparing one pulse with another H03K5/22; providing a determined threshold for switching H03K17/30) · CPC title

• H03K17/08116

  in composite switches (H03K17/0812, H03K17/0814 take precedence) · CPC title

• H03K17/0828 Primary

  in composite switches · CPC title