Method of manufacturing multi-layer coil and multi-layer coil device

US10217563B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10217563-B2
Application numberUS-201414446340-A
CountryUS
Kind codeB2
Filing dateJul 30, 2014
Priority dateAug 2, 2013
Publication dateFeb 26, 2019
Grant dateFeb 26, 2019

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A method of manufacturing a multi-layer coil includes steps of providing a substrate; forming a seed layer on the substrate; and plating the seed layer with N coil layers by N current densities according to N threshold ranges, so as to form the multi-layer coil on the substrate, wherein an i-th current density of the N current densities is lower than an (i+1)-th current density of the N current densities. A first coil layer of the N coil layers is plated on the seed layer by a first current density of the N current densities. When an aspect ratio of an i-th coil layer of the N coil layers is within an i-th threshold range of the N threshold ranges, an (i+1)-th coil layer of the N coil layers is plated on the i-th coil layer by the (i+1)-th current density.

First claim

Opening claim text (preview).

What is claimed is: 1. A method of manufacturing a multi-layer coil comprising: providing a substrate; forming a seed layer on the substrate, wherein the seed layer comprises a plurality of winding turns of a conductive wire, wherein each two adjacent winding turns of the conductive wire are separated by a gap; and plating N metal layers on the seed layer to encapsulate the plurality of winding turns of the conductive wire to form a multi-layer coil with N different current densities respectively, N being a positive integer not less than 3, wherein each metal layer is in contact with a different area of the top surface of the substrate to encapsulate a corresponding winding turn of the conductive wire, wherein the current density used for plating each metal layer increases as the level of the metal layer increases, and the current density difference between each two adjacent metal layers decreases as the level of the metal layer increases. 2. The method of claim 1 , wherein the current density used for plating each metal layer is at a pre-determined current density and an aspect ratio of each metal layer is within a pre-determined range. 3. The method of claim 2 , wherein the current density used for plating the bottom metal layer is at 5.39 ASD (amperes per square decimeter), wherein an aspect ratio of the bottom metal layer is from 1 to 1.8. 4. The method of claim 3 , wherein the current density used for plating a second metal layer disposed on the bottom layer is 8.98 ASD (amperes per square decimeter), wherein an aspect ratio of the second metal layer is from 2 to 2.8. 5. The method of claim 4 , wherein the current density used for plating a third metal layer disposed on the second metal layer is 10.78 ASD (amperes per square decimeter), wherein an aspect ratio of the third metal layer is from 2.8 to 4. 6. The method of claim 1 , wherein the multi-layer coil is spiral-shaped with a plurality of rings, wherein a gap between two adjacent rings is smaller than 30 μm. 7. The method of claim 6 , wherein the gap between two adjacent rings is smaller than 10 μm. 8. The method of claim 1 , wherein an aspect ratio of the multi-layer coil is larger than 1.5 and a height of the multi-layer coil is larger than 70 μm. 9. The method of claim 1 , further comprising forming an insulating protective layer on the multi-layer coil. 10. The method of claim 1 , further comprising forming a magnetic body to enclose the substrate and the multi-layer coil. 11. The method of claim 10 , wherein the magnetic body comprises a pillar penetrating the substrate. 12. The method of claim 10 , further comprising forming an electrode on the magnetic body and an electric pole to electrically connect the multi-layer coil and the electrode. 13. The method of claim 1 , wherein the material of the substrate comprises aluminium oxide (Al 2 O 3 ). 14. The method of claim 1 , wherein the substrate is a silicon wafer. 15. The method of claim 1 , wherein the substrate is a glass substrate. 16. The method of claim 1 , wherein the substrate is a lead frame. 17. The method of claim 1 , wherein the substrate is a printed circuit board (PCB). 18. A method of manufacturing a multi-layer coil comprising: providing a substrate; forming a seed layer on the substrate, wherein the seed layer comprises a plurality of winding turns of a conductive wire, wherein each two adjacent winding turns of the conductive wire are separated by a gap; and plating at least three metal layers comprising a first metal layer, a second metal layer and a third metal layer on the seed layer to encapsulate the plurality of winding turns of the conductive wire to form a multi-layer coil with different current densities respectively, wherein each metal layer is in contact with a different area of the top surface of the substrate to encapsulate a corresponding winding turn of the conductive wire, wherein the second metal layer is disposed on the first metal layer and the third metal layer is disposed on the second metal layer, wherein a first current density used for plating the first metal layer is less than a second current density used for plating the second metal layer, and the second current density used for plating the second metal layer is less than a third current density used for plating the third metal layer, wherein the difference between the second current density and the first current density is greater than the difference between the third current density and the second current density. 19. The method of claim 18 , further comprising forming a magnetic body to enclose the substrate and the multi-layer coil.

Assignees

Inventors

Classifications

  • Electroplating of selected surface areas · CPC title

  • Printed inductances (printed coils for dynamo-electric machines H02K3/26; printed circuits H05K) · CPC title

  • H01F41/042Primary

    by thin film techniques · CPC title

  • with a magnetic layer · CPC title

  • Electromagnet, transformer or inductor · CPC title

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What does patent US10217563B2 cover?
A method of manufacturing a multi-layer coil includes steps of providing a substrate; forming a seed layer on the substrate; and plating the seed layer with N coil layers by N current densities according to N threshold ranges, so as to form the multi-layer coil on the substrate, wherein an i-th current density of the N current densities is lower than an (i+1)-th current density of the N current…
Who is the assignee on this patent?
Cyntec Co Ltd
What technology area does this patent fall under?
Primary CPC classification H01F41/042. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Feb 26 2019 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 1 related publication on this page (citations in our corpus or others sharing the same primary CPC).