Fast magnetoelectric device based on current-driven domain wall propagation

Patent metadata

Field	Value
Publication number	US-10217522-B2
Application number	US-201715600958-A
Country	US
Kind code	B2
Filing date	May 22, 2017
Priority date	May 23, 2016
Publication date	Feb 26, 2019
Grant date	Feb 26, 2019

Abstract

In some examples, an electronic device comprising an input ferroelectric (FE) capacitor, an output FE capacitor, and a channel positioned beneath the input FE capacitor and positioned beneath the output FE capacitor. In some examples, the channel is configured to carry a magnetic signal from the input FE capacitor to the output FE capacitor to cause a voltage change at the output FE capacitor. In some examples, the electronic device further comprises a transistor-based drive circuit electrically connected to an output node of the output FE capacitor. In some examples, the transistor-based drive circuit is configured to deliver, based on the voltage change at the output FE capacitor, an output signal to an input node of a second device.

First claim

What is claimed is:

1. An electronic device comprising:
an input ferroelectric (FE) capacitor including a first dielectric layer;
an output FE capacitor including a second dielectric layer;
a channel positioned beneath the first dielectric layer of the input FE capacitor and positioned beneath the second dielectric layer of the output FE capacitor, wherein the channel forms at least part of a lower terminal of the input FE capacitor, wherein the channel forms at least part of a lower terminal of the output FE capacitor, and wherein the channel is configured to carry a magnetic signal from the input FE capacitor to the output FE capacitor to cause a voltage change at the output FE capacitor;
a transistor-based drive circuit electrically connected to an output node at an upper terminal of the output FE capacitor, wherein the transistor-based drive circuit is configured to deliver, based on the voltage change at the output FE capacitor, an output signal to an input node of a second device;
a layer of high-resistivity material (HRM) positioned beneath the channel; and
a switch electrically connected to the layer of HRM proximate the output FE capacitor or proximate the input FE capacitor, wherein the layer of HRM is configured to carry an electrical current when the switch is closed, and wherein the electrical current is configured to facilitate the channel to carry the magnetic signal.

2. The electronic device of claim 1 , wherein the transistor-based drive circuit comprises an inverter circuit, wherein the inverter circuit is configured to deliver the output signal to the input node of the second device by at least delivering an inverted form of the voltage change at the output FE capacitor to the input node of the second device.

3. The electronic device of claim 2 , wherein the inverter circuit comprises a high-side transistor and a low-side transistor, wherein a gate terminal of the high-side transistor is electrically connected to the output node of the output FE capacitor, wherein a gate terminal of the low-side transistor is electrically connected to the output node of the output FE capacitor, and wherein a drain terminal of the high-side transistor and a drain terminal of the low-side transistor are electrically connected to the input node of the second device.

4. The electronic device of claim 1 , wherein the channel comprises a ferromagnetic (FM) channel, the electronic device further comprising:
an FM layer including an FM material with in-plane magnetic anisotropy (IMA-FM material), wherein the FM layer is positioned between the first dielectric layer of the input FE capacitor and the FM channel, and wherein the FM layer forms at least part of the lower terminal of the input FE capacitor; and
an exchange-coupling control interlayer positioned between the FM layer and the FM channel.

5. The electronic device of claim 1 , further comprising a reset circuit electrically connected to the output node of the output FE capacitor, wherein the reset circuit is configured to reset the voltage change at the output FE capacitor to a default state.

6. The electronic device of claim 1 , wherein the input FE capacitor is a first input FE capacitor, the electronic device further comprising at least three input FE capacitors,
wherein the at least three input FE capacitors include the first input FE capacitor,
wherein respective dielectric layers of each input FE capacitor of the at least three input FE capacitors is positioned above the channel,
wherein the channel forms at least part of respective lower terminals of each input FE capacitor of the at least three input FE capacitors, and
wherein the magnetization state of the channel is configured to change in response to voltage applied across a majority of the at least three input FE capacitors.

7. The electronic device of claim 1 , wherein the input node of the second device comprises an input node of an input FE capacitor of a second electronic device or an input node of a transistor-based device.

8. An electronic device comprising:
an input ferroelectric (FE) capacitor including a first dielectric layer;
an output FE capacitor including a second dielectric layer;
a ferromagnetic (FM) channel positioned beneath the first dielectric layer of the input FE capacitor and positioned beneath the second dielectric layer of the output FE capacitor, wherein the FM channel forms at least part of a lower terminal of the input FE capacitor, wherein the FM channel forms at least part of a lower terminal of the output FE capacitor, wherein a magnetization state of the FM channel is configured to change in response to a voltage applied across the input FE capacitor, and wherein a change in the magnetization state of the FM channel causes a voltage change at the output FE capacitor; and
an FM layer including an FM material with in-plane magnetic anisotropy (IMA-FM material), wherein the FM layer is positioned between the first dielectric layer of the input FE capacitor and the FM channel, and wherein the FM layer forms at least part of the lower terminal of the input FE capacitor.

9. The electronic device of claim 8 , wherein the FM channel comprises an FM material with perpendicular magnetic anisotropy (PMA-FM material), and wherein the input FE capacitor is configured to induce, through the FM layer, the change in the magnetization state in the FM channel in response to the voltage applied across the input FE capacitor.

10. The electronic device of claim 8 , further comprising an oxide layer positioned above the FM channel and positioned between the input FE capacitor and the output FE capacitor.

11. The electronic device of claim 8 , further comprising:
a layer of high-resistivity material (HRM) positioned beneath the FM channel; and
a switch electrically connected to the layer of HRM proximate the output FE capacitor or proximate the input FE capacitor, wherein the layer of HRM is configured to carry an electrical current when the switch is closed, and wherein the electrical current is configured to facilitate the change in the magnetization state of the FM channel.

12. The electronic device of claim 11 , wherein the layer of HRM comprises platinum, a platinum alloy, a platinum multilayer, tungsten, a tungsten alloy, a tungsten multilayer, tantalum, a tantalum alloy, a tantalum multilayer, or a topological insulator.

13. The electronic device of claim 8 , further comprising a transistor-based drive circuit electrically connected to an output node at an upper terminal of the output FE capacitor, wherein the transistor-based drive circuit is configured to deliver an output signal to an input FE capacitor of a second electronic device based on the voltage change at the output FE capacitor.

14. The electronic device of claim 13 , wherein the transistor-based drive circuit comprises an inverter circuit, wherein the inverter circuit is configured to deliver the output signal to the input FE capacitor of the second electronic device by at least delivering an inverted form of the voltage change at the output FE capacitor to the input FE capacitor of the second electronic device.

15. The electronic device of claim 8 , wherein the input FE capacitor is a first input FE capacitor, the electronic device further comprising at least three input FE capacitors,
wherein the at least three input FE capacitors include the first input FE capacitor,
wherein respective dielectric layers of each input FE capacitor of the at least three input FE capacitors are positioned above the FM channel,
wherein the FM channel forms at least part of respective lower terminals of each input FE capacitor of

Assignees

• Univ Minnesota

Inventors

• Wang Jian-Ping
• Jamali Mahdi
• Sapatnekar Sachin S
• Mankalale Meghna G
• Liang Zhaoxin
• Klemm Smith Angeline
• Dc Mahendra
• Kim Hyung-Il
• Zhao Zhengyang

Classifications

• H01L29/0692

  Electricity · mapped topic

• H01L43/08

  Electricity · mapped topic

• G11C19/005

  with ferro-electric elements (condensers) · CPC title

• G11C11/1675

  Writing or programming circuits or methods · CPC title

• H01L2027/11824

  Electricity · mapped topic