Display panel having a reduced number of data lines and a reduced number of channels for a driver

Patent metadata

Field	Value
Publication number	US-10217436-B2
Application number	US-201514819327-A
Country	US
Kind code	B2
Filing date	Aug 5, 2015
Priority date	Jan 12, 2015
Publication date	Feb 26, 2019
Grant date	Feb 26, 2019

Abstract

A display panel includes a plurality of pixels. Each pixel includes a plurality of different-color sub-pixels and a coupling sub-pixel that overlaps at least one color sub-pixel so as to be configured to be capacitively coupled to the at least one color sub-pixel to be thereby driven so as to display a color different from that of the different-color sub-pixels.

First claim

What is claimed is:

1. A display panel comprising a plurality of pixels, each pixel comprising:
a plurality of color sub-pixels configured to display different colors from each other; and
a coupling sub-pixel which overlaps at least one color sub-pixel of the color sub-pixels in plan view so as to be capacitively coupled to the at least one color sub-pixel to be thereby driven so as to display a color different from the colors of the color sub-pixels,
wherein the plurality of color sub-pixels comprises a first color sub-pixel and a second color sub-pixel, the first color sub-pixel is capacitively coupled to the coupling sub-pixel to form a first capacitance between the first color sub-pixel and the coupling sub-pixel, the second color sub-pixel is capacitively coupled to the coupling sub-pixel to form a second capacitance between the second color sub-pixel and the coupling sub-pixel, and the first capacitance is greater than the second capacitance.

2. The display panel of claim 1 , wherein the plurality of color sub-pixels further comprises a third color sub-pixel, the third color sub-pixel is capacitively coupled to the coupling sub-pixel to form a third capacitance between the third color sub-pixel and the coupling sub-pixel, and the third capacitance is smaller than the second capacitance.

3. The display panel of claim 2 , wherein the coupling sub-pixel comprises:
a coupling pixel electrode; and
a first area in which a first drain electrode of a first pixel transistor of the first color sub-pixel overlaps the coupling pixel electrode is greater than a second area in which a second drain electrode of a second pixel transistor of the second color sub-pixel overlaps the coupling pixel electrode in plan view.

4. The display panel of claim 3 , further comprising a third area in which a third drain electrode of a third pixel transistor of the third color sub-pixel overlaps the coupling pixel electrode in plan view, wherein the third area is smaller than the second area.

5. The display panel of claim 2 , wherein the first color sub-pixel is a green sub-pixel configured to display a green color and the coupling sub-pixel is a white sub-pixel configured to display a white color.

6. The display panel of claim 5 , wherein the second color sub-pixel is a red sub-pixel configured to display a red color and the third color sub-pixel is a blue sub-pixel configured to display a blue color.

7. A display panel comprising:
a plurality of pixels, each pixel comprising:
a plurality of color sub-pixels configured to display different colors from each other; and
a coupling sub-pixel which overlaps at least one color sub-pixel of the color sub-pixels in plan view so as to be capacitively coupled to the at least one color sub-pixel to be thereby driven so as to display a color different from the colors of the color sub-pixels, the coupling sub-pixel including a coupling pixel electrode which is not configured to receive a data voltage directly from a data line,
wherein the at least one color sub-pixel comprises a color high sub-pixel and a color low sub-pixel configured to display an image having a brightness lower than a brightness of an image displayed by the color high sub-pixel, and the coupling sub-pixel overlaps the color low sub-pixel in plan view, so as to be capacitively coupled to the color low sub-pixel, and
wherein the color low sub-pixel comprises a first transistor configured to receive a data voltage and a second transistor configured to receive a down voltage to divide the data voltage.

8. The display panel of claim 7 , wherein the first transistor comprises a source electrode configured to receive the data voltage, a gate electrode configured to receive a gate signal, and a drain electrode, and wherein the second transistor comprises a drain electrode connected to the drain electrode of the first transistor, a gate electrode configured to receive the gate signal, and a source electrode configured to receive the down voltage.

9. The display panel of claim 8 , wherein the at least one color sub-pixel comprises a color pixel electrode, and the drain electrodes of the first and second transistors contact the color pixel electrode, are insulated from the coupling pixel electrode, and overlap at least a portion of the coupling pixel electrode in plan view.

10. The display panel of claim 9 , further comprising a common electrode facing the color pixel electrode and the coupling pixel electrode.

Assignees

• Samsung Display Co Ltd

Inventors

• Lee Junpyo
• Jeon Byungkil

Classifications

• G02F1/133514

  Colour filters · CPC title

• G09G3/3648 Primary

  using an active matrix (G09G3/367 - G09G3/3696 take precedence) · CPC title

• G02F2001/134354

  Physics · mapped topic

• G09G5/02 Primary

  characterised by the way in which colour is displayed {(details of colour display specific for CRTs G09G1/28; specific for flat matrix panels other than liquid crystal displays G09G3/2003; specific for liquid crystal displays G09G3/3607)} · CPC title

• G09G2300/0804

  Sub-multiplexed active matrix panel, i.e. wherein one active driving circuit is used at pixel level for multiple image producing elements · CPC title